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基于多晶硅薄膜晶体管的光子计数阵列(PCA)像素内电路的性能。

Performance of in-pixel circuits for photon counting arrays (PCAs) based on polycrystalline silicon TFTs.

作者信息

Liang Albert K, Koniczek Martin, Antonuk Larry E, El-Mohri Youcef, Zhao Qihua, Street Robert A, Lu Jeng Ping

机构信息

Department of Radiation Oncology, University of Michigan, Argus I Building, 519 W. William Street, Ann Arbor, MI 48109, USA.

出版信息

Phys Med Biol. 2016 Mar 7;61(5):1968-85. doi: 10.1088/0031-9155/61/5/1968. Epub 2016 Feb 15.

Abstract

Photon counting arrays (PCAs), defined as pixelated imagers which measure the absorbed energy of x-ray photons individually and record this information digitally, are of increasing clinical interest. A number of PCA prototypes with a 1 mm pixel-to-pixel pitch have recently been fabricated with polycrystalline silicon (poly-Si)-a thin-film technology capable of creating monolithic imagers of a size commensurate with human anatomy. In this study, analog and digital simulation frameworks were developed to provide insight into the influence of individual poly-Si transistors on pixel circuit performance-information that is not readily available through empirical means. The simulation frameworks were used to characterize the circuit designs employed in the prototypes. The analog framework, which determines the noise produced by individual transistors, was used to estimate energy resolution, as well as to identify which transistors contribute the most noise. The digital framework, which analyzes how well circuits function in the presence of significant variations in transistor properties, was used to estimate how fast a circuit can produce an output (referred to as output count rate). In addition, an algorithm was developed and used to estimate the minimum pixel pitch that could be achieved for the pixel circuits of the current prototypes. The simulation frameworks predict that the analog component of the PCA prototypes could have energy resolution as low as 8.9% full width at half maximum (FWHM) at 70 keV; and the digital components should work well even in the presence of significant thin-film transistor (TFT) variations, with the fastest component having output count rates as high as 3 MHz. Finally, based on conceivable improvements in the underlying fabrication process, the algorithm predicts that the 1 mm pitch of the current PCA prototypes could be reduced significantly, potentially to between ~240 and 290 μm.

摘要

光子计数阵列(PCA)被定义为一种像素化成像器,它能单独测量X射线光子的吸收能量并以数字方式记录该信息,目前在临床上越来越受到关注。最近,一些像素间距为1毫米的PCA原型已采用多晶硅(poly-Si)制造而成,多晶硅是一种薄膜技术,能够制造出尺寸与人体解剖结构相当的单片成像器。在本研究中,开发了模拟和数字仿真框架,以深入了解单个多晶硅晶体管对像素电路性能的影响,而这些信息通过经验方法是难以获得的。这些仿真框架用于表征原型中采用的电路设计。模拟框架用于确定单个晶体管产生的噪声,以估计能量分辨率,并识别出产生噪声最多的晶体管。数字框架则分析在晶体管特性存在显著变化时电路的功能情况,用于估计电路产生输出的速度(称为输出计数率)。此外,还开发了一种算法并用于估计当前原型像素电路能够实现的最小像素间距。仿真框架预测,PCA原型中的模拟组件在70 keV时的能量分辨率可低至半高宽(FWHM)的8.9%;数字组件即使在薄膜晶体管(TFT)存在显著变化的情况下也应能良好工作,最快的组件输出计数率高达3 MHz。最后,基于对基础制造工艺可能的改进措施,该算法预测当前PCA原型的1毫米间距可大幅减小,可能降至约240至290μm之间。

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