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厚全耗尽MAPS背面终端结构的设计与表征

Design and Characterization of Backside Termination Structures for Thick Fully-Depleted MAPS.

作者信息

Corradino Thomas, Dalla Betta Gian-Franco, De Cilladi Lorenzo, Neubüser Coralie, Pancheri Lucio

机构信息

Dipartimento di Ingegneria Industriale, Università degli Studi di Trento, 38123 Trento, Italy.

Trento Institute for Fundamental Physics and Applications-Istituto Nazionale di Fisica Nucleare (TIFPA-INFN), 38123 Trento, Italy.

出版信息

Sensors (Basel). 2021 May 31;21(11):3809. doi: 10.3390/s21113809.

Abstract

Fully Depleted Monolithic Active Pixel Sensors (FD-MAPS) represent an appealing alternative to hybrid detectors for radiation imaging applications. We have recently demonstrated the feasibility of FD-MAPS based on a commercial 110 nm CMOS technology, adapted using high-resistivity substrates and backside post-processing. A p/n junction diode, fabricated on the detector backside using low-temperature processing steps after the completion of the front-side Back End of Line (BEOL), is reverse-biased to achieve the full depletion of the substrate and thus fast charge collection by drift. Test diodes including termination structures with different numbers of floating guard rings and different pitches were fabricated together with other Process Control Monitor structures. In this paper, we present the design of the backside diodes, together with results from the electrical characterization of the test devices, aiming to improve understanding of the strengths and limitations of the proposed approach. Characterization results obtained on several wafers demonstrate the effectiveness of the termination rings in increasing the breakdown voltage of the backside diodes and in coping with the variability of the passivation layer characteristics. A breakdown voltage exceeding 400 V in the worst case was demonstrated in devices with 30 guard rings with 6 μm pitch, thus enabling the full depletion of high-resistivity substrates with a thickness larger than or equal to 300 μm. Additionally, we show the first direct comparison for this technology of measured pixel characteristics with 3D TCAD simulations, proving a good agreement in the extracted operating voltages.

摘要

全耗尽单片有源像素传感器(FD-MAPS)是用于辐射成像应用的混合探测器的一种有吸引力的替代方案。我们最近展示了基于商业110 nm CMOS技术的FD-MAPS的可行性,该技术通过使用高电阻率衬底和背面后处理进行了改进。在前端后端(BEOL)完成后,利用低温处理步骤在探测器背面制造的p/n结二极管被反向偏置,以实现衬底的完全耗尽,从而通过漂移实现快速电荷收集。与其他过程控制监测结构一起制造了包括具有不同数量浮动保护环和不同间距的终端结构的测试二极管。在本文中,我们介绍了背面二极管的设计以及测试器件的电学特性结果,旨在增进对所提出方法的优点和局限性的理解。在几个晶圆上获得的表征结果证明了终端环在提高背面二极管的击穿电压以及应对钝化层特性变化方面的有效性。在具有6μm间距的30个保护环的器件中,最坏情况下的击穿电压超过400 V,从而能够使厚度大于或等于300μm的高电阻率衬底完全耗尽。此外,我们展示了该技术首次将测量的像素特性与3D TCAD模拟进行的直接比较,证明在提取的工作电压方面有良好的一致性。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/a836/8199031/507edf0858cb/sensors-21-03809-g001.jpg

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