Nie Xinfeng, Wang Ying, Yu Chenghao, Fei Xinxing, Yang Jianqun, Li Xingji
Key Laboratory of RF Circuits and Systems, Ministry of Education, Hangzhou Dianzi University, Hangzhou 310018, China.
Yangzhou Marine Electronic Instrument Institute, Yangzhou 225001, China.
Micromachines (Basel). 2023 Dec 23;15(1):35. doi: 10.3390/mi15010035.
Due to its high thermal conductivity, high critical breakdown electric field, and high power, the silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) has been generally used in industry. In industrial applications, a common reliability problem in SiC MOSFET is avalanche failure. For applications in an avalanche environment, an improved, vertical, double-diffused MOSFET (VDMOSFET) device has been proposed. In this article, an unclamped inductive switching (UIS) test circuit has been built using the Mixed-Mode simulator in the TCAD simulation software, and the simulation results for UIS are introduced for a proposed SiC-power VDMOSFET by using Sentaurus TCAD simulation software. The simulation results imply that the improved VDMOSFET has realized a better UIS performance compared with the conventional VDMOSFET with a buffer layer (B-VDMOSFET) in the same conditions. Meanwhile, at room temperature, the modified VDMOSFET has a smaller on-resistance (R) than B-VDMOSFET. This study can provide a reference for SiC VDMOSFET in scenarios which have high avalanche reliability requirements.
由于碳化硅(SiC)金属氧化物半导体场效应晶体管(MOSFET)具有高导热性、高临界击穿电场和高功率,它已在工业中得到广泛应用。在工业应用中,SiC MOSFET常见的可靠性问题是雪崩故障。针对雪崩环境中的应用,人们提出了一种改进的垂直双扩散MOSFET(VDMOSFET)器件。在本文中,利用TCAD仿真软件中的混合模式模拟器构建了一个非钳位电感开关(UIS)测试电路,并使用Sentaurus TCAD仿真软件介绍了一种拟议的SiC功率VDMOSFET的UIS仿真结果。仿真结果表明,在相同条件下,改进后的VDMOSFET与具有缓冲层的传统VDMOSFET(B-VDMOSFET)相比,实现了更好的UIS性能。同时,在室温下,改进后的VDMOSFET的导通电阻(R)比B-VDMOSFET更小。本研究可为雪崩可靠性要求高的场景中的SiC VDMOSFET提供参考。