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用于极坐标表示图像分类的复值神经网络的现场可编程门阵列实现

FPGA Implementation of Complex-Valued Neural Network for Polar-Represented Image Classification.

作者信息

Ahmad Maruf, Zhang Lei, Chowdhury Muhammad E H

机构信息

Faculty of Engineering and Applied Science, University of Regina, Regina, SK S4S 0A2, Canada.

Department of Electrical Engineering, Qatar University, Doha 2713, Qatar.

出版信息

Sensors (Basel). 2024 Jan 30;24(3):897. doi: 10.3390/s24030897.

Abstract

This proposed research explores a novel approach to image classification by deploying a complex-valued neural network (CVNN) on a Field-Programmable Gate Array (FPGA), specifically for classifying 2D images transformed into polar form. The aim of this research is to address the limitations of existing neural network models in terms of energy and resource efficiency, by exploring the potential of FPGA-based hardware acceleration in conjunction with advanced neural network architectures like CVNNs. The methodological innovation of this research lies in the Cartesian to polar transformation of 2D images, effectively reducing the input data volume required for neural network processing. Subsequent efforts focused on constructing a CVNN model optimized for FPGA implementation, emphasizing the enhancement of computational efficiency and overall performance. The experimental findings provide empirical evidence supporting the efficacy of the image classification system developed in this study. One of the developed models, CVNN_128, achieves an accuracy of 88.3% with an inference time of just 1.6 ms and a power consumption of 4.66 mW for the classification of the MNIST test dataset, which consists of 10,000 frames. While there is a slight concession in accuracy compared to recent FPGA implementations that achieve 94.43%, our model significantly excels in classification speed and power efficiency-surpassing existing models by more than a factor of 100. In conclusion, this paper demonstrates the substantial advantages of the FPGA implementation of CVNNs for image classification tasks, particularly in scenarios where speed, resource, and power consumption are critical.

摘要

本拟议研究探索了一种通过在现场可编程门阵列(FPGA)上部署复值神经网络(CVNN)进行图像分类的新方法,具体用于对转换为极坐标形式的二维图像进行分类。本研究的目的是通过探索基于FPGA的硬件加速与诸如CVNN等先进神经网络架构相结合的潜力,来解决现有神经网络模型在能量和资源效率方面的局限性。本研究的方法创新在于二维图像的笛卡尔到极坐标转换,有效减少了神经网络处理所需的输入数据量。后续工作集中在构建针对FPGA实现进行优化的CVNN模型,强调提高计算效率和整体性能。实验结果提供了实证证据,支持了本研究中开发的图像分类系统的有效性。所开发的模型之一CVNN_128,对于由10,000帧组成的MNIST测试数据集的分类,实现了88.3%的准确率,推理时间仅为1.6毫秒,功耗为4.66毫瓦。虽然与实现94.43%准确率的近期FPGA实现相比,准确率略有下降,但我们的模型在分类速度和功率效率方面显著优于现有模型——比现有模型快100多倍。总之,本文展示了CVNN在FPGA上实现用于图像分类任务的显著优势,特别是在速度、资源和功耗至关重要的场景中。

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