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基于同时扰动的具有学习能力的脉冲密度神经网络的现场可编程门阵列实现。

FPGA implementation of a pulse density neural network with learning ability using simultaneous perturbation.

作者信息

Maeda Y, Tada T

机构信息

Dept. of Electr. Eng., Kansai Univ., Osaka, Japan.

出版信息

IEEE Trans Neural Netw. 2003;14(3):688-95. doi: 10.1109/TNN.2003.811357.

Abstract

Hardware realization is very important when considering wider applications of neural networks (NNs). In particular, hardware NNs with a learning ability are intriguing. In these networks, the learning scheme is of much interest, with the backpropagation method being widely used. A gradient type of learning rule is not easy to realize in an electronic system, since calculation of the gradients for all weights in the network is very difficult. More suitable is the simultaneous perturbation method, since the learning rule requires only forward operations of the network to modify weights unlike the backpropagation method. In addition, pulse density NN systems have some promising properties, as they are robust to noisy situations and can handle analog quantities based on the digital circuits. We describe a field-programmable gate array realization of a pulse density NN using the simultaneous perturbation method as the learning scheme. We confirm the viability of the design and the operation of the actual NN system through some examples.

摘要

在考虑神经网络(NNs)更广泛的应用时,硬件实现非常重要。特别是具有学习能力的硬件神经网络很吸引人。在这些网络中,学习方案备受关注,反向传播方法被广泛使用。梯度类型的学习规则在电子系统中不易实现,因为计算网络中所有权重的梯度非常困难。更合适的是同时扰动方法,因为与反向传播方法不同,该学习规则只需要网络的前向操作来修改权重。此外,脉冲密度神经网络系统具有一些有前景的特性,因为它们对噪声情况具有鲁棒性,并且可以基于数字电路处理模拟量。我们描述了一种使用同时扰动方法作为学习方案的脉冲密度神经网络的现场可编程门阵列实现。我们通过一些示例证实了该设计的可行性以及实际神经网络系统的运行情况。

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