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使用现场可编程门阵列开发平台的多通道数字相敏检测

Multichannel digital phase sensitive detection using a field programmable gate array development platform.

作者信息

Lascos Steven J, Cassidy Daniel T

机构信息

Department of Engineering Physics, McMaster University, Hamilton, Ontario, Canada.

出版信息

Rev Sci Instrum. 2008 Jul;79(7):074702. doi: 10.1063/1.2956974.

Abstract

This paper describes the development and performance of digital phase sensitive detectors (PSDs) based on a field programmable gate array (FPGA) logic device. A FPGA development system combined with a custom analog data acquisition board provides a powerful platform for the development of digital signal processing systems. Conventional performance metrics for digital PSDs are determined by the analog front-end devices and do not represent improvements to the PSD itself. FPGAs offer a scalable platform on which digital PSDs can be implemented with enhanced capabilities including simultaneous demodulation of multiple independent analog signals at multiple frequencies with arbitrary demodulation functions. Circuits for providing dynamic frequency tracking and ultrafine (<0.001 degrees ) phase resolution are presented.

摘要

本文描述了基于现场可编程门阵列(FPGA)逻辑器件的数字相敏探测器(PSD)的开发与性能。结合定制模拟数据采集板的FPGA开发系统为数字信号处理系统的开发提供了一个强大的平台。数字PSD的传统性能指标由模拟前端设备决定,并不代表PSD本身的改进。FPGA提供了一个可扩展的平台,在该平台上可以实现具有增强功能的数字PSD,包括以任意解调功能同时解调多个频率的多个独立模拟信号。文中还介绍了用于提供动态频率跟踪和超精细(<0.001度)相位分辨率的电路。

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