Li Ming-Ze, Tang Kea-Tiong
Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan, R.O.C.
Annu Int Conf IEEE Eng Med Biol Soc. 2009;2009:3806-9. doi: 10.1109/IEMBS.2009.5335204.
This paper presents a low-noise low-power amplifier for implantable device for neural signal acquisition. By operating MOS transistors in the subthreshold region, smaller low-frequency noise and lower power consumption can be achieved. A low power, low-noise common-drain buffer and a low-noise, high-linearity, low pass filter are used for high frequency noise filtering. Post-layout simulation shows the input referred noise of the system is 2.19microVrms from 10Hz to 10 KHz, power consumption is 55.8microW, and the NEF is 2.53. The amplifier was fabricated using a TSMC 0.18microm 1P6M CMOS process. Simulation results show that this low-noise, low-power amplifier is suitable for implantable device applications.
本文提出了一种用于神经信号采集的植入式设备的低噪声低功耗放大器。通过在亚阈值区域操作MOS晶体管，可以实现更小的低频噪声和更低的功耗。一个低功耗、低噪声的共漏缓冲器和一个低噪声、高线性度的低通滤波器用于高频噪声滤波。布局后仿真表明，该系统从10Hz到10KHz的输入参考噪声为2.19微伏均方根值，功耗为55.8微瓦，噪声等效因子为2.53。该放大器采用台积电0.18微米1P6M CMOS工艺制造。仿真结果表明，这种低噪声、低功耗放大器适用于植入式设备应用。
