Szymanski T H, Hinton H S
Appl Opt. 1996 Mar 10;35(8):1253-68. doi: 10.1364/AO.35.001253.
A reconfigurable intelligent optical backplane architecture for parallel computing and communications is described. The backplane consists of a large number of reconfigurable optical channels organized in a ring with relatively simple point-to-point optical interconnections between neighboring smart-pixel arrays. The intelligent backplane can implement (l) dynamically reconfigurable connections between any printed circuit boards, (2) dynamic embeddings of classical interconnection networks such as buses, rings, multidimensional meshes, hypercubes, shuffles, and crossbars, (3) multipoint switching, (4) sorting, (5) parallel-prefix operations, (6) pattern-matching operations, (7) snoopy caches and intelligent memory systems, and (8) media-access control functions. The smart-pixel arrays can be enhanced to include more complex functions, such as queuing and routing, as the technologies mature. Descriptions of the architecture and the smart-pixel arrays and discussions of the system cost, availability, and performance are included.
本文描述了一种用于并行计算和通信的可重构智能光背板架构。该背板由大量可重构光通道组成，这些光通道以环形排列，相邻智能像素阵列之间具有相对简单的点对点光互连。智能背板可以实现：(1) 任意印刷电路板之间的动态可重构连接；(2) 诸如总线、环、多维网格、超立方体、混洗和交叉开关等经典互连网络的动态嵌入；(3) 多点交换；(4) 排序；(5) 并行前缀操作；(6) 模式匹配操作；(7) 窥探高速缓存和智能内存系统；(8) 媒体访问控制功能。随着技术的成熟，智能像素阵列可以增强以包含更复杂的功能，如排队和路由。文中还包括了该架构和智能像素阵列的描述，以及对系统成本、可用性和性能的讨论。
