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用于韩国超导托卡马克先进研究装置(KSTAR)的数字积分器的开发。

Development of a digital integrator for the KSTAR device.

作者信息

Seo Seong-Heon, Werner Andreas, Marquardt M

机构信息

National Fusion Research Institute, Daejeon 305-333, Korea.

出版信息

Rev Sci Instrum. 2010 Dec;81(12):123507. doi: 10.1063/1.3519303.

Abstract

The development of an integrator for magnetic diagnostics becomes more important as the pulse length of fusion devices gets longer and longer, especially for present-day superconducting fusion devices. A small offset in the signal can cause a significant drift in the integrator output for long pulse experiments. A lock-in amplifying digital integrator has been developed for Wendelstein 7-X (W7-X). It succeeds in suppressing the drift to a low value but requires about 100 ms for data processing. To shorten the data processing time, a Field Programmable Gate Array (FPGA) built in the digitizer is utilized. Since there is no need to transfer the data to an external computer, the integration can be done in real time. The microprocessor built in the digitizer directly transfers the data integrated in the internal FPGA into the reflective memory installed in the same compact Peripheral Component Interconnect chassis. These features result in a very compact system design. The design and the preliminary results of the digital integrator will be presented.

摘要

随着聚变装置的脉冲长度越来越长,尤其是对于当今的超导聚变装置而言,用于磁诊断的积分器的开发变得愈发重要。对于长时间脉冲实验,信号中的一个小偏移可能会导致积分器输出出现显著漂移。已为文德斯坦7-X(W7-X)开发了一种锁相放大数字积分器。它成功地将漂移抑制到了一个较低的值,但数据处理需要大约100毫秒。为了缩短数据处理时间,采用了数字化仪中内置的现场可编程门阵列(FPGA)。由于无需将数据传输到外部计算机,因此可以实时进行积分。数字化仪中内置的微处理器直接将在内部FPGA中积分的数据传输到安装在同一紧凑型外围组件互连机箱中的反射式存储器中。这些特性带来了非常紧凑的系统设计。将介绍数字积分器的设计和初步结果。

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