Zou Huan, Geng Yongtao, Wang Pingshan
Department of Physical Electronics, University of Electronics Science and Technology of China, Chengdu, Sichuan, China.
Rev Sci Instrum. 2011 Feb;82(2):023301. doi: 10.1063/1.3534834.
A few traditional pulse forming circuits are implemented and compared in a commercial 0.13 μm digital CMOS technology. Standard on-chip transmission lines are used as pulse forming lines (PFLs), while CMOS transistors are used as switches. The shortest output pulses of these circuits are analyzed and compared through Cadence Spectre simulations. All the CMOS circuits are fabricated in the commercial technology. Pulses of ∼170 ps durations and 120-400 mV amplitudes are obtained when the power supply is tuned from 1.2 to 2 V. The results show that these traditional PFL based circuits can be implemented in standard CMOS technology for high power short pulse generations. Furthermore, the PFL circuits significantly extend the short pulse generation capabilities of CMOS technologies.
在商用0.13μm数字CMOS技术中实现并比较了几种传统的脉冲形成电路。标准片上传输线用作脉冲形成线（PFL），而CMOS晶体管用作开关。通过Cadence Spectre仿真分析并比较了这些电路的最短输出脉冲。所有CMOS电路均采用该商用技术制造。当电源从1.2V调至2V时，可获得持续时间约为170ps、幅度为120 - 400mV的脉冲。结果表明，这些基于传统PFL的电路可在标准CMOS技术中实现，用于产生高功率短脉冲。此外，PFL电路显著扩展了CMOS技术产生短脉冲的能力。
