The VLSI Systems Center, LPCAS, Ben-Gurion University, P.O.B. 653, Be'er-Sheva 84105, Israel.
Sensors (Basel). 2012;12(8):10067-85. doi: 10.3390/s120810067. Epub 2012 Jul 25.
Modern "smart" CMOS sensors have penetrated into various applications, such as surveillance systems, bio-medical applications, digital cameras, cellular phones and many others. Reducing the power of these sensors continuously challenges designers. In this paper, a low power global shutter CMOS image sensor with Wide Dynamic Range (WDR) ability is presented. This sensor features several power reduction techniques, including a dual voltage supply, a selective power down, transistors with different threshold voltages, a non-rationed logic, and a low voltage static memory. A combination of all these approaches has enabled the design of the low voltage "smart" image sensor, which is capable of reaching a remarkable dynamic range, while consuming very low power. The proposed power-saving solutions have allowed the maintenance of the standard architecture of the sensor, reducing both the time and the cost of the design. In order to maintain the image quality, a relation between the sensor performance and power has been analyzed and a mathematical model, describing the sensor Signal to Noise Ratio (SNR) and Dynamic Range (DR) as a function of the power supplies, is proposed. The described sensor was implemented in a 0.18 um CMOS process and successfully tested in the laboratory. An SNR of 48 dB and DR of 96 dB were achieved with a power dissipation of 4.5 nW per pixel.
现代“智能”CMOS 传感器已经渗透到各种应用中，如监控系统、生物医学应用、数码相机、手机等。不断降低这些传感器的功耗是设计人员面临的挑战。本文提出了一种具有宽动态范围（WDR）能力的低功耗全局快门 CMOS 图像传感器。该传感器采用了多种降低功耗的技术，包括双电源供电、选择性关断、具有不同阈值电压的晶体管、非定比逻辑和低压静态存储器。所有这些方法的结合使设计出的低电压“智能”图像传感器能够达到显著的动态范围，同时消耗非常低的功率。所提出的节能解决方案允许保持传感器的标准架构，从而减少设计的时间和成本。为了保持图像质量，分析了传感器性能与功率之间的关系，并提出了一个数学模型，该模型将传感器的信噪比（SNR）和动态范围（DR）描述为电源的函数。所描述的传感器采用 0.18 um CMOS 工艺实现，并在实验室中成功进行了测试。在每个像素消耗 4.5 nW 的功率下，实现了 48 dB 的 SNR 和 96 dB 的 DR。
