IEEE Trans Biomed Circuits Syst. 2007 Jun;1(2):105-15. doi: 10.1109/TBCAS.2007.908110.
A high-voltage (HV) integrated circuit has been demonstrated to transport fluidic droplet samples on programmable paths across the array of driving electrodes on its hydrophobically coated surface. This exciter chip is the engine for dielectrophoresis (DEP)-based micro-fluidic lab-on-a-chip systems, creating field excitations that inject and move fluidic droplets onto and about the manipulation surface. The architecture of this chip is expandable to arrays of N X N identical HV electrode driver circuits and electrodes. The exciter chip is programmable in several senses. The routes of multiple droplets may be set arbitrarily within the bounds of the electrode array. The electrode excitation waveform voltage amplitude, phase, and frequency may be adjusted based on the system configuration and the signal required to manipulate a particular fluid droplet composition. The voltage amplitude of the electrode excitation waveform can be set from the minimum logic level up to the maximum limit of the breakdown voltage of the fabrication technology. The frequency of the electrode excitation waveform can also be set independently of its voltage, up to a maximum depending upon the type of droplets that must be driven. The exciter chip can be coated and its oxide surface used as the droplet manipulation surface or it can be used with a top-mounted, enclosed fluidic chamber consisting of a variety of materials. The HV capability of the exciter chip allows the generated DEP forces to penetrate into the enclosed chamber region and an adjustable voltage amplitude can accommodate a variety of chamber floor thicknesses. This demonstration exciter chip has a 32 x 32 array of nominally 100 V electrode drivers that are individually programmable at each time point in the procedure to either of two phases: 0deg and 180deg with respect to the reference clock. For this demonstration chip, while operating the electrodes with a 100-V peak-to-peak periodic waveform, the maximum HV electrode waveform frequency is about 200 Hz; and standard 5-V CMOS logic data communication rate is variable up to 250 kHz. This HV demonstration chip is fabricated in a 130-V 1.0-mum SOI CMOS fabrication technology, dissipates a maximum of 1.87 W, and is about 10.4 mm x 8.2 mm.
已展示一种高压（HV）集成电路，该集成电路能够在其疏水涂层表面的驱动电极阵列上沿可编程路径传输流体制样。这种激励芯片是基于介电泳（DEP）的微流控芯片系统的引擎，可产生激励场，将流体制样注入并移动到操作表面上和周围。该芯片的架构可扩展为 N X N 个相同的 HV 电极驱动器电路和电极的阵列。该激励芯片在几个方面具有可编程性。多个液滴的路径可以在电极阵列的边界内任意设置。可以根据系统配置和操作特定流体制样所需的信号来调整电极激励波形的电压幅度、相位和频率。电极激励波形的电压幅度可以从最小逻辑电平设置到制造技术击穿电压的最大值。电极激励波形的频率也可以独立于其电压设置，最高频率取决于必须驱动的液滴类型。激励芯片可以进行涂层处理，并将其氧化物表面用作液滴操作表面，也可以与顶部安装的封闭流体腔一起使用，该封闭流体腔由各种材料组成。激励芯片的 HV 能力允许产生的介电泳力渗透到封闭腔区域，并且可调节的电压幅度可以适应各种腔底厚度。该演示激励芯片具有一个 32 x 32 的电极驱动器阵列，每个电极驱动器在程序的每个时间点都可以单独编程为两个相位之一：0 度和 180 度，相对于参考时钟。对于这个演示芯片，在使用 100-V 峰峰值周期性波形操作电极时，最大 HV 电极波形频率约为 200 Hz；并且标准 5-V CMOS 逻辑数据通信速率最高可达 250 kHz。该 HV 演示芯片是在 130-V 1.0-um SOI CMOS 制造技术中制造的，最大功耗为 1.87 W，尺寸约为 10.4 mm x 8.2 mm。
