Mounaïm Fayçal, Sawan Mohamad
Department of Electrical Engineering, Polystim Neurotechnologies Laboratory, Ecole Polytechnique de Montreal, Montreal, QC H3T 1J4 Canada.
IEEE Trans Biomed Circuits Syst. 2012 Aug;6(4):309-18. doi: 10.1109/TBCAS.2012.2185796.
In order to investigate new neurostimulation strategies for micturition recovery in spinal cord injured patients, custom implantable stimulators are required to carry-on chronic animal experiments. However, higher integration of the neurostimulator becomes increasingly necessary for miniaturization purposes, power consumption reduction, and for increasing the number of stimulation channels. As a first step towards total integration, we present in this paper the design of a highly-integrated neurostimulator that can be assembled on a 21-mm diameter printed circuit board. The prototype is based on three custom integrated circuits fabricated in High-Voltage (HV) CMOS technology, and a low-power small-scale commercially available FPGA. Using a step-down approach where the inductive voltage is left free up to 20 V, the inductive power and data recovery front-end is fully integrated. In particular, the front-end includes a bridge rectifier, a 20-V voltage limiter, an adjustable series regulator (5 to 12 V), a switched-capacitor step-down DC/DC converter (1:3, 1:2, or 2:3 ratio), as well as data recovery. Measurements show that the DC/DC converter achieves more than 86% power efficiency while providing around 3.9-V from a 12-V input at 1-mA load, 1:3 conversion ratio, and 50-kHz switching frequency. With such efficiency, the proposed step-down inductive power recovery topology is more advantageous than its conventional step-up counterpart. Experimental results confirm good overall functionality of the system.
为了研究脊髓损伤患者排尿功能恢复的新神经刺激策略,需要定制可植入刺激器来进行慢性动物实验。然而,为了实现小型化、降低功耗以及增加刺激通道数量,神经刺激器的更高集成度变得越来越必要。作为迈向完全集成的第一步,我们在本文中展示了一种高度集成的神经刺激器的设计,该刺激器可组装在直径为21毫米的印刷电路板上。该原型基于采用高压(HV)CMOS技术制造的三个定制集成电路以及一个低功耗的小规模商用FPGA。采用降压方法,其中感应电压可自由上升至20V,感应功率和数据恢复前端实现了完全集成。具体而言,前端包括一个桥式整流器、一个20V限压器、一个可调串联稳压器(5至12V)、一个开关电容降压式DC/DC转换器(1:3、1:2或2:3比例)以及数据恢复功能。测量结果表明,该DC/DC转换器在1mA负载、1:3转换比例和50kHz开关频率下,从12V输入提供约3.9V电压时,功率效率超过86%。具有这样的效率,所提出的降压式感应功率恢复拓扑结构比传统的升压式拓扑结构更具优势。实验结果证实了该系统具有良好的整体功能。