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用于阵列式电润湿芯片实验室的拉普拉斯势垒研究。

Investigation of Laplace barriers for arrayed electrowetting lab-on-a-chip.

作者信息

Schultz A, Papautsky I, Heikenfeld J

机构信息

Department of Electrical Engineering and Computing Systems, University of Cincinnati , Cincinnati, Ohio 45221, United States.

出版信息

Langmuir. 2014 May 13;30(18):5349-56. doi: 10.1021/la500314v. Epub 2014 Apr 28.

Abstract

Partial-post Laplace barriers have been postulated as a means to allow electrowetting transport and geometrical reshaping of fluids, followed by the preservation of fluid geometry after the electrowetting voltage is removed. Reported here is the first investigation of Laplace barriers with the arrayed electrodes and splitting/merging transport functions for an electrowetting lab-on-a-chip. Laplace barriers optimized for 500 × 500 μm(2) electrodes and 78 μm channel height are shown to provide geometrical control of fluid shape down to radii of curvature of ~70 μm. The Laplace barriers increase the splitting volume error, but with proper electrical control, the average error in the split volume is reduced to 5%. Improved programmable fluid storage in droplets or reservoirs and continuous channel flow are also shown. This work confirms the potential benefits of Laplace barriers for lab-on-a-chip and also reveals the unique challenges and operation requirements for Laplace barriers in lab-on-a-chip applications.

摘要

部分后拉普拉斯势垒已被假定为一种实现电润湿传输和流体几何形状重塑的手段,即在去除电润湿电压后保持流体几何形状。本文首次报道了对用于电润湿芯片实验室的具有阵列电极以及分裂/合并传输功能的拉普拉斯势垒的研究。针对500×500μm²电极和78μm通道高度优化的拉普拉斯势垒能够对流体形状进行几何控制,曲率半径可达约70μm。拉普拉斯势垒会增加分裂体积误差,但通过适当的电控制,分裂体积的平均误差可降至5%。还展示了在液滴或储液器中改进的可编程流体存储以及连续通道流动。这项工作证实了拉普拉斯势垒对于芯片实验室的潜在益处,同时也揭示了其在芯片实验室应用中的独特挑战和操作要求。

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