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用于多级抗蚀剂结构纳米级图案化的电容耦合等离子体中Si3N4层的脉冲偏压蚀刻。

Pulse-biased etching of Si3N4-layer in capacitively-coupled plasmas for nano-scale patterning of multi-level resist structures.

作者信息

Lee Hyelim, Kim Sechan, Choi Gyuhyun, Lee Nae-Eung

出版信息

J Nanosci Nanotechnol. 2014 Dec;14(12):9470-6. doi: 10.1166/jnn.2014.10166.

DOI:10.1166/jnn.2014.10166
PMID:25971085
Abstract

Pulse-biased plasma etching of various dielectric layers is investigated for patterning nano-scale, multi-level resist (MLR) structures composed of multiple layers via dual-frequency, capacitively-coupled plasmas (CCPs). We compare the effects of pulse and continuous-wave (CW) biasing on the etch characteristics of a Si3N4 layer in CF4/CH2F2/O2/Aretch chemistries using a dual-frequency, superimposed CCP system. Pulse-biasing conditions using a low-frequency power source of 2 MHz were varied by controlling duty ratio, period time, power, and the gas flow ratio in the plasmas generated by the 27.12 MHz high-frequency power source. Application of pulse-biased plasma etching significantly affected the surface chemistry of the etched Si3N4 surfaces, and thus modified the etching characteristics of the Si3N4 layer. Pulse-biased etching was successfully applied to patterning of the nano-scale line and space pattern of Si3N4 in the MLR structure of KrF photoresist/bottom anti-reflected coating/SiO2/amorphous carbon layer/Si3N4. Pulse-biased etching is useful for tuning the patterning of nano-scale dielectric hard-mask layers in MLR structures.

摘要

通过双频电容耦合等离子体(CCP)对各种介电层进行脉冲偏压等离子体蚀刻,以对由多层组成的纳米级多层抗蚀剂(MLR)结构进行图案化。我们使用双频叠加CCP系统,比较了脉冲偏压和连续波(CW)偏压对CF4/CH2F2/O2/Ar蚀刻化学中Si3N4层蚀刻特性的影响。通过控制占空比、周期时间、功率以及由27.12 MHz高频电源产生的等离子体中的气体流量比,改变了使用2 MHz低频电源的脉冲偏压条件。脉冲偏压等离子体蚀刻的应用显著影响了蚀刻后的Si3N4表面的表面化学性质,从而改变了Si3N4层的蚀刻特性。脉冲偏压蚀刻成功应用于在KrF光刻胶/底部抗反射涂层/SiO2/非晶碳层/Si3N4的MLR结构中对Si3N4的纳米级线宽和间距图案进行图案化。脉冲偏压蚀刻对于调整MLR结构中纳米级介电硬掩膜层的图案化很有用。

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