Gulzari Usman Ali, Sajid Muhammad, Anjum Sheraz, Agha Shahrukh, Torres Frank Sill
Department of Electrical Engineering, COMSATS Institute of Information Technology, Islamabad, Pakistan.
Department of Computer Science, COMSATS Institute of Information Technology, Wah Cantt, Pakistan.
PLoS One. 2016 Dec 1;11(12):e0167590. doi: 10.1371/journal.pone.0167590. eCollection 2016.
A Mesh topology is one of the most promising architecture due to its regular and simple structure for on-chip communication. Performance of mesh topology degraded greatly by increasing the network size due to small bisection width and large network diameter. In order to overcome this limitation, many researchers presented modified Mesh design by adding some extra links to improve its performance in terms of network latency and power consumption. The Cross-By-Pass-Mesh was presented by us as an improved version of Mesh topology by intelligent addition of extra links. This paper presents an efficient topology named Cross-By-Pass-Torus for further increase in the performance of the Cross-By-Pass-Mesh topology. The proposed design merges the best features of the Cross-By-Pass-Mesh and Torus, to reduce the network diameter, minimize the average number of hops between nodes, increase the bisection width and to enhance the overall performance of the network. In this paper, the architectural design of the topology is presented and analyzed against similar kind of 2D topologies in terms of average latency, throughput and power consumption. In order to certify the actual behavior of proposed topology, the synthetic traffic trace and five different real embedded application workloads are applied to the proposed as well as other competitor network topologies. The simulation results indicate that Cross-By-Pass-Torus is an efficient candidate among its predecessor's and competitor topologies due to its less average latency and increased throughput at a slight cost in network power and energy for on-chip communication.
网状拓扑结构因其用于片上通信的规则且简单的结构，是最具前景的架构之一。由于其二等分带宽小和网络直径大，随着网络规模的增加，网状拓扑结构的性能会大幅下降。为了克服这一限制，许多研究人员通过添加一些额外链路来改进网状设计，以提高其在网络延迟和功耗方面的性能。我们提出了交叉旁路网状结构，作为通过智能添加额外链路改进的网状拓扑结构版本。本文提出了一种名为交叉旁路环面的高效拓扑结构，以进一步提高交叉旁路网状拓扑结构的性能。所提出的设计融合了交叉旁路网状结构和环面的最佳特性，以减小网络直径，最小化节点间的平均跳数，增加二等分带宽，并提高网络的整体性能。在本文中，给出了该拓扑结构的架构设计，并针对类似的二维拓扑结构，在平均延迟、吞吐量和功耗方面进行了分析。为了验证所提出拓扑结构的实际性能，将合成流量跟踪和五种不同的实际嵌入式应用工作负载应用于所提出的以及其他竞争网络拓扑结构。仿真结果表明，交叉旁路环面在其前身和竞争拓扑结构中是一个高效的候选者，因为它具有较低的平均延迟和较高的吞吐量，只是在片上通信的网络功率和能量方面略有增加。
