Melo Emerson G, Alayo Marco I, Carvalho Daniel O
Opt Express. 2017 May 1;25(9):9755-9760. doi: 10.1364/OE.25.009755.
In this work we investigate the principles of an alternative method for defining sidewall in optical waveguides fabricated using planar technology. The efficiency of this method is demonstrated through simulations and experimental results regarding propagation losses of a solid core ARROW waveguide fabricated on silicon substrate. It is well known that waveguides fabricated using sidewalls etched via Reactive Ion Etching (RIE) can present high sidewall roughness, especially if metallic hard-masks are used. This is largely responsible for the undesirable losses observed in these waveguides. The basic strategy of the proposed method is to do the etching step, in the fabrication of the waveguides, before the deposition of the core, so as to have the lower cladding layer and part of the silicon substrate etched away. Only after this, is the core of the waveguide deposited. This results in a waveguide sustained by a silicon pedestal. With this process, losses as low as 0.45 dB cm for multimode and 0.84 dB cm for single mode waveguides are obtained. The numerical simulations demonstrate that roughness in sidewalls implicates in propagation losses which are at least five times larger that those in the bulk of the material, thus corroborating the idea behind the proposed method.
在这项工作中，我们研究了一种用于定义采用平面技术制造的光波导侧壁的替代方法的原理。通过对在硅衬底上制造的实心芯ARROW波导的传播损耗进行模拟和实验结果，证明了该方法的有效性。众所周知，使用反应离子刻蚀（RIE）蚀刻侧壁制造的波导可能会出现高侧壁粗糙度，特别是如果使用金属硬掩模的话。这在很大程度上是这些波导中出现不良损耗的原因。所提出方法的基本策略是在制造波导时，在沉积芯层之前进行蚀刻步骤，以便蚀刻掉下层包层和部分硅衬底。只有在此之后，才沉积波导的芯层。这导致波导由硅基座支撑。通过这个过程，多模波导的损耗低至0.45 dB/cm，单模波导的损耗低至0.84 dB/cm。数值模拟表明，侧壁粗糙度会导致传播损耗，其至少比材料主体中的损耗大五倍，从而证实了所提出方法背后的理念。
