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基于铟氧化物/氧化锌异质结构的低温处理薄膜晶体管中的电荷输运。

Charge Transport in Low-Temperature Processed Thin-Film Transistors Based on Indium Oxide/Zinc Oxide Heterostructures.

机构信息

Fachbereich Chemie, Eduard-Zintl-Institut, Fachgebiet Anorganische Chemie , Technische Universität Darmstadt , Alarich-Weiss-Straße 12 , 64287 Darmstadt , Germany.

Forschungszentrum Jülich GmbH, Ernst Ruska-Centre (ERC) and Peter Grünberg Institute (PGI) , Wilhelm-Johnen-Straße , 52428 Jülich , Germany.

出版信息

ACS Appl Mater Interfaces. 2018 Jun 20;10(24):20661-20671. doi: 10.1021/acsami.8b03322. Epub 2018 Jun 11.

Abstract

The influence of the composition within multilayered heterostructure oxide semiconductors has a critical impact on the performance of thin-film transistor (TFT) devices. The heterostructures, comprising alternating polycrystalline indium oxide and zinc oxide layers, are fabricated by a facile atomic layer deposition (ALD) process, enabling the tuning of its electrical properties by precisely controlling the thickness of the individual layers. This subsequently results in enhanced TFT performance for the optimized stacked architecture after mild thermal annealing at temperatures as low as 200 °C. Superior transistor characteristics, resulting in an average field-effect mobility (μ) of 9.3 cm V s ( W/ L = 500), an on/off ratio ( I/ I) of 5.3 × 10, and a subthreshold swing of 162 mV dec, combined with excellent long-term and bias stress stability are thus demonstrated. Moreover, the inherent semiconducting mechanism in such multilayered heterostructures can be conveniently tuned by controlling the thickness of the individual layers. Herein, devices comprising a higher InO/ZnO ratio, based on individual layer thicknesses, are predominantly governed by percolation conduction with temperature-independent charge carrier mobility. Careful adjustment of the individual oxide layer thicknesses in devices composed of stacked layers plays a vital role in the reduction of trap states, both interfacial and bulk, which consequently deteriorates the overall device performance. The findings enable an improved understanding of the correlation between TFT performance and the respective thin-film composition in ALD-based heterostructure oxides.

摘要

多层异质结构氧化物半导体中组成的影响对薄膜晶体管(TFT)器件的性能有至关重要的影响。这些异质结构由交替的多晶氧化铟和氧化锌层组成,通过简便的原子层沉积(ALD)工艺制备,通过精确控制各层的厚度可以调整其电学性能。这导致在 200°C 以下的温和热退火后,优化堆叠结构的 TFT 性能得到增强。优越的晶体管特性,平均场效应迁移率(μ)为 9.3 cm V s(W/L = 500),开关比(I/I)为 5.3×10,亚阈值摆幅为 162 mV dec,以及出色的长期和偏压稳定性得到了证明。此外,通过控制各层的厚度,可以方便地调整此类多层异质结构中的固有半导体机制。在此,基于各层厚度,具有较高 InO/ZnO 比的器件主要由与温度无关的电荷载流子迁移率的渗流传导控制。在由堆叠层组成的器件中仔细调整各氧化物层的厚度对于减少陷阱态(界面和体)起着至关重要的作用,这会降低整体器件性能。这些发现有助于更好地理解基于 ALD 的异质结构氧化物中 TFT 性能与各薄膜组成之间的相关性。

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