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用于光信道的运行时可重构自适应低密度奇偶校验编码

Run-time reconfigurable adaptive LDPC coding for optical channels.

作者信息

Sun Xiaole, Zou Ding, Qu Zhen, Djordjevic Ivan B

出版信息

Opt Express. 2018 Oct 29;26(22):29319-29329. doi: 10.1364/OE.26.029319.

DOI:10.1364/OE.26.029319
PMID:30470097
Abstract

In this paper, we proposed a class of large-girth QC-LDPC codes designed to maximize the girth property with code rates ranging from 0.5 to 0.8, which leads to well-structured parity-check matrix and generator matrix. Instead of implementing several FEC encoder and decoder engines in hardware, we design an efficient unified FPGA-based architecture enabling run-time reconfigurable capability. Apart from four principle LDPC codes being incorporated into a unified design, shortening is adopted to bridge the rate gap between principle codes. With our proposed unified LDPC engine, the signal-to-noise ratio (SNR) limits of -1 dB to 2.2 dB have been demonstrated at BER of 10 in additive white Gaussian noise (AWGN) channel by FPGA emulation. It is desirable for the application to both free-space optical (FSO) and fiber optics communications. Large code rate range is preferred to deal with various channel impairments. To further verify the proposed unified code engine for FSO applications, we tested the scheme through a spatial light modulator (SLM)-based FSO channel emulator. We showed that in medium atmospheric turbulence regime, a post-FEC BER below 10 can be achieved without any interleaver and adaptive optics.

摘要

在本文中,我们提出了一类大围长的准循环低密度奇偶校验(QC-LDPC)码,其设计目的是在码率范围为0.5至0.8时最大化围长特性,这会产生结构良好的奇偶校验矩阵和生成矩阵。我们没有在硬件中实现多个前向纠错(FEC)编码器和解码器引擎,而是设计了一种基于现场可编程门阵列(FPGA)的高效统一架构,使其具备运行时可重构能力。除了将四种主要的LDPC码纳入统一设计外,还采用了缩短技术来弥合主要码之间的码率差距。通过FPGA仿真,在加性高斯白噪声(AWGN)信道中,对于我们提出的统一LDPC引擎,在误码率为10时已证明其信噪比(SNR)限制为-1 dB至2.2 dB。这对于自由空间光(FSO)和光纤通信应用都是理想的。较大的码率范围更有利于应对各种信道损伤。为了进一步验证所提出的用于FSO应用的统一码引擎,我们通过基于空间光调制器(SLM)的FSO信道模拟器对该方案进行了测试。我们表明,在中等大气湍流状态下,无需任何交织器和自适应光学器件即可实现低于10的前向纠错后误码率。

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