Sun Zhiyuan, Huang Chunyi, Guo Jinglong, Dong Jason T, Klie Robert F, Lauhon Lincoln J, Seidman David N
Department of Materials Science and Engineering , Northwestern University , 2220 Campus Drive , Evanston , Illinois 60208-3108 , United States.
Department of Physics , University of Illinois at Chicago , Chicago , Illinois 60607 , United States.
ACS Nano. 2019 Mar 26;13(3):3730-3738. doi: 10.1021/acsnano.9b01231. Epub 2019 Mar 1.
Strain engineering of semiconductors is used to modulate carrier mobility, tune the energy bandgap, and drive growth of self-assembled nanostructures. Understanding strain-energy relaxation mechanisms including phase transformations, dislocation nucleation and migration, and fracturing is essential to both exploit this degree of freedom and avoid degradation of carrier lifetime and mobility, particularly in prestrained electronic devices and flexible electronics that undergo large changes in strain during operation. Raman spectroscopy, high-resolution transmission electron microscopy, and electron diffraction are utilized to identify strain-energy release mechanisms of bent diamond-cubic silicon (Si) and zinc-blende GaAs nanowires, which were elastically strained to >6% at room temperature and then annealed at an elevated temperature to activate relaxation mechanisms. High-temperature annealing of bent Si-nanowires leads to the nucleation, glide, and climb of dislocations, which align themselves to form grain boundaries, thereby reducing the strain energy. Herein, Si nanowires are reported to undergo polygonization, which is the formation of polygonal-shaped grains separated by grain boundaries consisting of aligned edge dislocations. Furthermore, strain is shown to drive dopant diffusion. In contrast to the behavior of Si, GaAs nanowires release strain energy by forming nanocracks in regions of tensile strain due to the weakening of As-bonds. These insights into the relaxation behavior of highly strained crystals can inform the design of nanoelectronic devices and provide guidance on mitigating degradation.
半导体的应变工程用于调节载流子迁移率、调整能带隙以及驱动自组装纳米结构的生长。了解包括相变、位错形核与迁移以及破裂在内的应变能弛豫机制，对于利用这一自由度以及避免载流子寿命和迁移率的退化至关重要，特别是在预应变电子器件和在运行过程中经历大应变变化的柔性电子器件中。拉曼光谱、高分辨率透射电子显微镜和电子衍射被用于识别弯曲的金刚石立方硅（Si）和闪锌矿结构砷化镓（GaAs）纳米线的应变能释放机制，这些纳米线在室温下被弹性应变至>6%，然后在高温下退火以激活弛豫机制。弯曲的硅纳米线在高温退火时会导致位错的形核、滑移和攀移，位错会排列形成晶界，从而降低应变能。在此报道，硅纳米线会经历多边形化，即由由排列的刃型位错组成的晶界分隔的多边形晶粒的形成。此外，应变被证明会驱动掺杂剂扩散。与硅的行为相反，由于砷键的减弱，砷化镓纳米线通过在拉伸应变区域形成纳米裂纹来释放应变能。这些对高应变晶体弛豫行为的见解可为纳米电子器件的设计提供参考，并为减轻退化提供指导。
