Hoozemans Joost, van Straten Jeroen, Viitanen Timo, Tervo Aleksi, Kadlec Jiri, Al-Ars Zaid
1Delft University of Technology, Delft, The Netherlands.
2Tampere University of Technology, Tampere, Finland.
J Signal Process Syst. 2019;91(1):61-73. doi: 10.1007/s11265-018-1424-1. Epub 2019 Jan 2.
The proliferation of processing hardware alternatives allows developers to use various customized computing platforms to run their applications in an optimal way. However, porting application code on custom hardware requires a lot of development and porting effort. This paper describes a heterogeneous computational platform (the ALMARVI execution platform) comprising of multiple communicating processors that allow easy programmability through an interface to OpenCL. The ALMARVI platform uses processing elements based on both VLIW and Transport Triggered Architectures (-VEX and TCE cores, respectively). It can be implemented on Zynq devices such as the ZedBoard, and supports OpenCL by means of the pocl (Portable OpenCL) project and our ALMAIF interface specification. This allows developers to execute kernels transparently on either processing elements, thereby allowing to optimize execution time with minimal design and development effort.
处理硬件替代方案的激增使开发人员能够使用各种定制计算平台以最佳方式运行其应用程序。然而,在定制硬件上移植应用程序代码需要大量的开发和移植工作。本文描述了一种异构计算平台(ALMARVI执行平台),它由多个通信处理器组成,通过OpenCL接口实现轻松编程。ALMARVI平台使用基于VLIW和传输触发架构的处理元件(分别为-VEX和TCE内核)。它可以在诸如ZedBoard之类的Zynq设备上实现,并通过pocl(便携式OpenCL)项目和我们的ALMAIF接口规范支持OpenCL。这使开发人员能够在任何一个处理元件上透明地执行内核,从而以最少的设计和开发工作量优化执行时间。