Ho Yun-Lung, Huang Yu-De, Wang Kai-Yen, Fang Wai-Chi
Annu Int Conf IEEE Eng Med Biol Soc. 2019 Jul;2019:664-667. doi: 10.1109/EMBC.2019.8856322.
Independent component analysis (ICA) has been wildly used to improve EEG based application such as brain computer interface (BCI). However, some well know ICA algorithm, such as Infomax ICA, suffering from the problem of convergence latency and make it hard to be apply on real-time application. This paper proposes a highly efficient chip implementation of multi-channel EEG real-time system based on online recursive independent component analysis algorithm (ORICA). The core size of the chip is 1.5525-mm using 28nm CMOS technology. The EEG demonstration board will be implemented with the ORICA chip. The operation frequency and power consumption of the chip are 100 MHz and 17.9 mW respectively. The proposed chip was validated with a real-time circuit integrated system and the average correlation coefficient between simulations results and chip processing results is 0.958.
独立成分分析(ICA)已被广泛用于改进基于脑电图的应用,如脑机接口(BCI)。然而,一些知名的ICA算法,如信息最大化ICA,存在收敛延迟问题,使其难以应用于实时应用。本文提出了一种基于在线递归独立成分分析算法(ORICA)的多通道脑电图实时系统的高效芯片实现方案。该芯片采用28nm CMOS技术,核心尺寸为1.5525平方毫米。脑电图演示板将采用ORICA芯片实现。该芯片的工作频率和功耗分别为100 MHz和17.9 mW。所提出的芯片通过实时电路集成系统进行了验证,仿真结果与芯片处理结果之间的平均相关系数为0.958。