Peloso Riccardo, Capra Maurizio, Sole Luigi, Ruo Roch Massimo, Masera Guido, Martina Maurizio
Department of Electronics and Telecommunication (DET), Politecnico di Torino, C.so Duca degli Abruzzi 24, 10129 Turin, Italy.
Sensors (Basel). 2020 Mar 4;20(5):1405. doi: 10.3390/s20051405.
In the last years, the need for new efficient video compression methods grown rapidly as frame resolution has increased dramatically. The Joint Collaborative Team on Video Coding (JCT-VC) effort produced in 2013 the H.265/High Efficiency Video Coding (HEVC) standard, which represents the state of the art in video coding standards. Nevertheless, in the last years, new algorithms and techniques to improve coding efficiency have been proposed. One promising approach relies on embedding direction capabilities into the transform stage. Recently, the Steerable Discrete Cosine Transform (SDCT) has been proposed to exploit directional DCT using a basis having different orientation angles. The SDCT leads to a sparser representation, which translates to improved coding efficiency. Preliminary results show that the SDCT can be embedded into the HEVC standard, providing better compression ratios. This paper presents a hardware architecture for the SDCT, which is able to work at a frequency of 188 M Hz , reaching a throughput of 3.00 GSample/s. In particular, this architecture supports 8k UltraHigh Definition (UHD) (7680 × 4320) with a frame rate of 60 Hz , which is one of the best resolutions supported by HEVC.
在过去几年中，随着帧分辨率急剧提高，对新型高效视频压缩方法的需求迅速增长。视频编码联合协作团队（JCT-VC）于2013年推出了H.265/高效视频编码（HEVC）标准，该标准代表了视频编码标准的当前水平。然而，在过去几年中，人们提出了新的算法和技术来提高编码效率。一种有前景的方法是将方向能力嵌入到变换阶段。最近，有人提出了可控离散余弦变换（SDCT），以利用具有不同方向角度的基来实现方向离散余弦变换。SDCT能带来更稀疏的表示，这意味着编码效率得到提高。初步结果表明，SDCT可以嵌入到HEVC标准中，从而提供更好的压缩比。本文提出了一种用于SDCT的硬件架构，该架构能够以188MHz的频率工作，实现3.00 GSample/s的吞吐量。特别是，该架构支持8K超高清（UHD）（7680×4320）、帧率为60Hz的视频，这是HEVC支持的最佳分辨率之一。
