Jaikla Winai, Khateb Fabian, Kulej Tomasz, Pitaksuttayaprot Koson
Department of Engineering Education, Faculty of Industrial Education and Technology, King Mongkut's Institute of Technology Ladkrabang, Bangkok 10520, Thailand.
Department of Microelectronics, Brno University of Technology, Technická 10, 601 90 Brno, Czech Republic.
Sensors (Basel). 2021 Mar 1;21(5):1683. doi: 10.3390/s21051683.
This paper proposes the simulated and experimental results of a universal filter using the voltage differencing differential difference amplifier (VDDDA). Unlike the previous complementary metal oxide semiconductor (CMOS) structures of VDDDA that is present in the literature, the present one is compact and simple, owing to the employment of the multiple-input metal oxide semiconductor (MOS) transistor technique. The presented filter employs two VDDDAs, one resistor and two grounded capacitors, and it offers low-pass: LP, band-pass: BP, band-reject: BR, high-pass: HP and all-pass: AP responses with a unity passband voltage gain. The proposed universal voltage mode filter has high input impedances and low output impedance. The natural frequency and bandwidth are orthogonally controlled by using separated transconductance without affecting the passband voltage gain. For a BP filter, the root mean square (RMS) of the equivalent output noise is 46 µV, and the third intermodulation distortion (IMD3) is -49.5 dB for an input signal with a peak-to peak of 600 mV, which results in a dynamic range (DR) of 73.2 dB. The filter was designed and simulated in the Cadence environment using a 0.18-µm CMOS process from Taiwan semiconductor manufacturing company (TSMC). In addition, the experimental results were obtained by using the available commercial components LM13700 and AD830. The simulation results are in agreement with the experimental one that confirmed the advantages of the filter.
本文提出了一种使用电压差分微分差分放大器(VDDDA)的通用滤波器的仿真和实验结果。与文献中现有的互补金属氧化物半导体(CMOS)结构的VDDDA不同,由于采用了多输入金属氧化物半导体(MOS)晶体管技术,当前的VDDDA结构紧凑且简单。所提出的滤波器采用两个VDDDA、一个电阻器和两个接地电容器,并且它提供低通(LP)、带通(BP)、带阻(BR)、高通(HP)和全通(AP)响应,通带电压增益为单位增益。所提出的通用电压模式滤波器具有高输入阻抗和低输出阻抗。通过使用分离的跨导来正交控制固有频率和带宽,而不影响通带电压增益。对于一个BP滤波器,对于峰峰值为600 mV的输入信号,等效输出噪声的均方根(RMS)为46 μV,三阶互调失真(IMD3)为 -49.5 dB,这导致动态范围(DR)为73.2 dB。该滤波器在Cadence环境中使用台积电(TSMC)的(0.18) -μm CMOS工艺进行设计和仿真。此外,实验结果是通过使用可用的商用组件LM13700和AD830获得的。仿真结果与实验结果一致,证实了该滤波器的优点。