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二维多层二硫化铼中的受限通道迁移

Restricted Channel Migration in 2D Multilayer ReS.

作者信息

Kim Chulmin, Sung Moonsoo, Kim Soo Yeon, Lee Byung Chul, Kim Yeonsu, Kim Doyoon, Kim Yeeun, Seo Youkyung, Theodorou Christoforos, Kim Gyu-Tae, Joo Min-Kyu

机构信息

School of Electrical Engineering, Korea University, 145 Anam-ro, Seongbuk-gu, Seoul 02841, Republic of Korea.

Department of Applied Physics, Sookmyung Women's University, Seoul 04310, Republic of Korea.

出版信息

ACS Appl Mater Interfaces. 2021 Apr 28;13(16):19016-19022. doi: 10.1021/acsami.1c02111. Epub 2021 Apr 16.

DOI:10.1021/acsami.1c02111
PMID:33861077
Abstract

When thickness-dependent carrier mobility is coupled with Thomas-Fermi screening and interlayer resistance effects in two-dimensional (2D) multilayer materials, a conducting channel migrates from the bottom surface to the top surface under electrostatic bias conditions. However, various factors including (i) insufficient carrier density, (ii) atomically thin material thickness, and (iii) numerous oxide traps/defects considerably limit our deep understanding of the carrier transport mechanism in 2D multilayer materials. Herein, we report the restricted conducting channel migration in 2D multilayer ReS after a constant voltage stress of gate dielectrics is applied. At a given gate bias condition, a gradual increase in the drain bias enables a sensitive change in the interlayer resistance of ReS, leading to a modification of the shape of the transconductance curves, and consequently, demonstrates the conducting channel migration along the thickness of ReS before the stress. Meanwhile, this distinct conduction feature disappears after stress, indicating the formation of additional oxide trap sites inside the gate dielectrics that degrade the carrier mobility and eventually restrict the channel migration. Our theoretical and experimental study based on the resistor network model and Thomas-Fermi charge screening theory provides further insights into the origins of channel migration and restriction in 2D multilayer devices.

摘要

当二维(2D)多层材料中与厚度相关的载流子迁移率与托马斯 - 费米屏蔽和层间电阻效应相结合时,在静电偏置条件下,导电通道会从底面迁移到顶面。然而,包括(i)载流子密度不足、(ii)原子级薄的材料厚度以及(iii)大量氧化物陷阱/缺陷等各种因素,极大地限制了我们对二维多层材料中载流子传输机制的深入理解。在此,我们报道了在施加栅极电介质的恒压应力后,二维多层ReS中受限的导电通道迁移情况。在给定的栅极偏置条件下,漏极偏置的逐渐增加会使ReS的层间电阻发生敏感变化,导致跨导曲线形状的改变,进而证明了在应力之前导电通道沿ReS厚度的迁移。同时,这种独特的导电特性在应力后消失,表明在栅极电介质内部形成了额外的氧化物陷阱位点,这些位点会降低载流子迁移率并最终限制通道迁移。我们基于电阻网络模型和托马斯 - 费米电荷屏蔽理论的理论和实验研究,为二维多层器件中通道迁移和限制的起源提供了进一步的见解。

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