Design Guidelines and Kinetic Performance Limits for Spatial Comprehensive Three-Dimensional Chromatography for the Analysis of Intact Proteins.

The design aspects of microfluidic chips for spatial three-dimensional chromatography featuring an interconnected channel network and targeting protein analysis are discussed, and the corresponding kinetic performance limits have been established using a Pareto-optimality approach. The pros and cons to integrate different separation mechanisms (IEF, CE, SEC, RPLC, HILIC, HIC, and IEX) are discussed considering development stages in the spatial domain (LC) in the first and second dimension and time domain (LC) for the third dimension. Based on Pareto-optimization, we discuss the considerations of the channel length, particle diameter, and the effect of number of second- and third-dimension channels on the resulting peak capacity of a spatial IEF × SEC × RPLC device. Novel equations are proposed to determine the peak capacity in SEC and to account for sample modulation affected by the number of second- and third-dimension channels. The corresponding Pareto fronts have been constructed demonstrating the resolving power, in terms of peak capacity and analysis time, considering current state-of-the-art prototyping methodologies. A microfluidic spatial prototype chip with an integrated channel layout (64 D and 4096 D channels) has been created, which has the potential to yield a peak capacity of 32,600 within only 44 min of the total analysis time, by implementing IEF × SEC × RPLC separation stages.