Gayner Chhatrasal, Natanzon Yuriy, Kauffmann Yaron, Amouyal Yaron
Department of Materials Science and Engineering, Technion - Israel Institute of Technology, Haifa32000, Israel.
ACS Appl Mater Interfaces. 2022 Nov 9;14(44):49730-49745. doi: 10.1021/acsami.2c12843. Epub 2022 Oct 26.
Topological insulators (TIs) and thermoelectric (TE) materials seem to belong to distinct physical realms; however, in practice, they both share common characteristics. Introducing concepts from TIs into TE materials to enhance their performance and achieve better understanding of electronic transport requires extensive research. Particularly, grain size, misorientation, and grain boundary (GB) character are of utmost importance to attain effective charge carrier transport in TE polycrystals; these factors, however, have not been thoroughly explored. Herein, we investigate the correlation between grain size, misorientation, and lattice strain in BiTe and its TI signature, aiming to improve its TE performance. We reveal an unusual behavior showing that electron mobility increases upon the increase of grain size, reaching at a maximum value of 495 cm/V·s for an optimum grain size of 600 nm and most-frequent GB misorientation angle of 60° and then decreases with increasing grain size. It is also indicated that the combined effects of grain size reduction and point defects induce lattice strain in the BiTe-matrix that is essential to trigger the TI contribution to TE transport. This trend is corroborated by first-principles calculations showing that compressive strains form multiple valleys in the valence band and opens the TI band gap. Such a combination of physical phenomena in a well-known TE material is unique and can promote our understanding of the nature of TE transport with implications for TE energy conversion.
拓扑绝缘体（TIs）和热电（TE）材料似乎属于不同的物理领域；然而，实际上它们具有一些共同特征。将拓扑绝缘体的概念引入热电材料以提高其性能并更好地理解电子输运需要进行大量研究。特别是，晶粒尺寸、取向差和晶界（GB）特性对于在热电多晶中实现有效的电荷载流子输运至关重要；然而，这些因素尚未得到充分探索。在此，我们研究了BiTe中晶粒尺寸、取向差和晶格应变之间的相关性及其拓扑绝缘体特征，旨在提高其热电性能。我们揭示了一种不寻常的行为，即电子迁移率随着晶粒尺寸的增加而增加，对于600nm的最佳晶粒尺寸和最常见的60°晶界取向差，电子迁移率达到最大值495cm/V·s，然后随着晶粒尺寸的增加而降低。研究还表明，晶粒尺寸减小和点缺陷的综合作用会在BiTe基体中引起晶格应变，这对于触发拓扑绝缘体对热电输运的贡献至关重要。第一性原理计算证实了这一趋势，计算表明压缩应变在价带中形成多个谷并打开拓扑绝缘体带隙。在一种著名的热电材料中，这种物理现象的组合是独特的，有助于我们理解热电输运的本质，并对热电能量转换产生影响。
