Jia Xiaotao, Gu Huiyi, Liu Yuhao, Yang Jianlei, Wang Xueyan, Pan Weitao, Zhang Youguang, Cotofana Sorin, Zhao Weisheng
IEEE Trans Neural Netw Learn Syst. 2024 Sep;35(9):12913-12923. doi: 10.1109/TNNLS.2023.3265533. Epub 2024 Sep 3.
The robustness of Bayesian neural networks (BNNs) to real-world uncertainties and incompleteness has led to their application in some safety-critical fields. However, evaluating uncertainty during BNN inference requires repeated sampling and feed-forward computing, making them challenging to deploy in low-power or embedded devices. This article proposes the use of stochastic computing (SC) to optimize the hardware performance of BNN inference in terms of energy consumption and hardware utilization. The proposed approach adopts bitstream to represent Gaussian random number and applies it in the inference phase. This allows for the omission of complex transformation computations in the central limit theorem-based Gaussian random number generating (CLT-based GRNG) method and the simplification of multipliers as AND operations. Furthermore, an asynchronous parallel pipeline calculation technique is proposed in computing block to enhance operation speed. Compared with conventional binary radix-based BNN, SC-based BNN (StocBNN) realized by FPGA with 128-bit bitstream consumes much less energy consumption and hardware resources with less than 0.1% accuracy decrease when dealing with MNIST/Fashion-MNIST datasets.
贝叶斯神经网络(BNN)对现实世界中的不确定性和不完整性具有鲁棒性,这使其在一些安全关键领域得到了应用。然而,在BNN推理过程中评估不确定性需要重复采样和前馈计算,这使得它们在低功耗或嵌入式设备中难以部署。本文提出使用随机计算(SC)来优化BNN推理在能耗和硬件利用率方面的硬件性能。所提出的方法采用比特流来表示高斯随机数,并将其应用于推理阶段。这允许省略基于中心极限定理的高斯随机数生成(CLT-based GRNG)方法中的复杂变换计算,并将乘法器简化为与运算。此外,在计算模块中提出了一种异步并行流水线计算技术,以提高运算速度。与传统的基于二进制基数的BNN相比,采用128位比特流的FPGA实现的基于SC的BNN(StocBNN)在处理MNIST/Fashion-MNIST数据集时,能耗和硬件资源消耗要少得多,而精度下降不到0.1%。