IEEE Trans Biomed Circuits Syst. 2024 Feb;18(1):39-50. doi: 10.1109/TBCAS.2023.3302654. Epub 2024 Jan 26.
Wireless implantable devices are widely used in medical treatment, which should meet clinical constraints such as longevity, miniaturization, and reliable communication. Wireless power transfer (WPT) can eliminate the battery to reduce system size and prolong device life, while it's challenging to generate a reliable clock without a crystal. In this work, we propose a self-adaptive dual-injection-locked-ring-oscillator (dual-ILRO) clock-recovery technique based on two-tone WPT and integrate it into a battery-free neural-recording SoC. The 2[Formula: see text]-order inter-modulation (IM2) component of the two WPT tones is extracted as a low-frequency reference for battery-free SoC, and the proposed self-adaptive dual-ILRO technique extends the lock range to ensure an anti-interference PVT-robust clock generation. The neural-recording SoC includes a low-noise signal acquisition unit, a power management unit, and a backscatter circuit to perform neural signal recording, wireless power harvesting, and neural data transmission. Benefiting from the 6.4 μW low power of the clock recovery circuit, the overall SoC power is cut down to 49.8 μW. In addition, the proposed clock-recovery technique enables both signal acquisition and uplink communication to perform as well as that synchronized by an ideal clock, i.e., an effective number of 9.6 bits and a bit error rate (BER) less than 4.8 × 10 in chip measurement. The SoC takes a die area of 2.05 mm , and an animal test is conducted in a Sprague-Dawley rat to validate the wireless neural-recording performance, compared to a crystal-synchronized commercial chip.
无线植入式设备在医疗领域得到了广泛应用,需要满足长寿命、小型化和可靠通信等临床限制。无线功率传输 (WPT) 可以消除电池以减小系统尺寸并延长设备寿命,但是在没有晶体的情况下生成可靠的时钟具有挑战性。在这项工作中,我们提出了一种基于双音 WPT 的自适应双注入锁相环 (dual-ILRO) 时钟恢复技术,并将其集成到无电池神经记录 SoC 中。两个 WPT 音调的二阶互调 (IM2) 分量被提取为无电池 SoC 的低频参考,所提出的自适应双 ILRO 技术扩展了锁定范围,以确保在抗干扰 PVT 鲁棒的时钟生成。神经记录 SoC 包括一个低噪声信号采集单元、一个电源管理单元和一个反向散射电路,用于执行神经信号记录、无线功率收集和神经数据传输。受益于时钟恢复电路的 6.4 μW 低功耗,整个 SoC 功率降低到 49.8 μW。此外,所提出的时钟恢复技术使信号采集和上行链路通信都能够像理想时钟同步一样有效,即芯片测量中的有效位数为 9.6 位,误码率 (BER) 小于 4.8×10。SoC 的裸片面积为 2.05 mm ,并在 Sprague-Dawley 大鼠中进行了动物测试,以验证无线神经记录性能,与晶体同步的商用芯片相比。