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一种用于可重构智能表面最优配置的深度学习方法的硬件实现

Hardware Implementations of a Deep Learning Approach to Optimal Configuration of Reconfigurable Intelligence Surfaces.

作者信息

Martín-Martín Alberto, Padial-Allué Rubén, Castillo Encarnación, Parrilla Luis, Parellada-Serrano Ignacio, Morán Alejandro, García Antonio

机构信息

eesy-Innovation GmbH, 82008 Unterhaching, Germany.

Department of Electronics and Computer Technology, University of Granada, 18071 Granada, Spain.

出版信息

Sensors (Basel). 2024 Jan 30;24(3):899. doi: 10.3390/s24030899.

Abstract

Reconfigurable intelligent surfaces (RIS) offer the potential to customize the radio propagation environment for wireless networks, and will be a key element for 6G communications. However, due to the unique constraints in these systems, the optimization problems associated to RIS configuration are challenging to solve. This paper illustrates a new approach to the RIS configuration problem, based on the use of artificial intelligence (AI) and deep learning (DL) algorithms. Concretely, a custom convolutional neural network (CNN) intended for edge computing is presented, and implementations on different representative edge devices are compared, including the use of commercial AI-oriented devices and a field-programmable gate array (FPGA) platform. This FPGA option provides the best performance, with ×20 performance increase over the closest FP32, GPU-accelerated option, and almost ×3 performance advantage when compared with the INT8-quantized, TPU-accelerated implementation. More noticeably, this is achieved even when high-level synthesis (HLS) tools are used and no custom accelerators are developed. At the same time, the inherent reconfigurability of FPGAs opens a new field for their use as enabler hardware in RIS applications.

摘要

可重构智能表面(RIS)为定制无线网络的无线电传播环境提供了潜力,并且将成为6G通信的关键要素。然而,由于这些系统中的独特约束,与RIS配置相关的优化问题难以解决。本文阐述了一种基于人工智能(AI)和深度学习(DL)算法的RIS配置问题新方法。具体而言,提出了一种用于边缘计算的定制卷积神经网络(CNN),并比较了在不同代表性边缘设备上的实现,包括使用面向商业AI的设备和现场可编程门阵列(FPGA)平台。这种FPGA选项提供了最佳性能,与最接近的FP32 GPU加速选项相比性能提高了20倍,与INT8量化的TPU加速实现相比具有近3倍的性能优势。更值得注意的是,即使使用高级综合(HLS)工具且未开发定制加速器,也能实现这一目标。同时,FPGA固有的可重构性为其在RIS应用中用作使能硬件开辟了新领域。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/da97/10857622/8b6b13fb1aac/sensors-24-00899-g009.jpg

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