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通过原子层沉积组装的超薄纳米电容器。

Ultrathin nanocapacitor assembled via atomic layer deposition.

作者信息

Lopez Medina Javier Alonso Alonso, Mejía-Salazar J Ricardo, Carvalho William Orivaldo Faria, Lopez Mercado Cesar Alberto, Nedev N, Reyes Gómez Faustino, de Oliveira Osvaldo Novais, Farías M H, Tiznado Hugo

机构信息

Fisicoquim de Nanomateriales, Universidad Nacional Autónoma de México Centro de Nanociencias y Nanotecnología, Carretera Tijuana - Ensenada km 107, Ensenada, Baja California, 22800, MEXICO.

Instituto Nacional de Telecomunicações, Av. João de Camargo, 510, Sala III-11, Santa Rita do Sapucai, 37540-000, BRAZIL.

出版信息

Nanotechnology. 2024 Sep 25. doi: 10.1088/1361-6528/ad7f5c.

DOI:10.1088/1361-6528/ad7f5c
PMID:39321825
Abstract

We fabricated ultrathin metal - oxide - semiconductor (MOS) nanocapacitors using atomic layer deposition. The capacitors consist of a bilayer of Al2O3 and Y2O3 with a total thickness of ~10 nm, deposited on silicon substrate. The presence of the two materials, each slab being ~5 nm thick and uniform over a large area, was confirmed with Transmission Electron Microscopy and X-ray photoelectron spectroscopy (XPS). The capacitance in accumulation varied from 1.6 nF (at 1MHz) to ~2.8 nF (at 10 kHz), which is one to two orders of magnitude higher than other nanocapacitors. This high capacitance is attributed to the synergy between the dielectric properties of ultrathin Al2O3 and Y2O3 layers. The electrical properties of the nanocapacitor are stable within a wide range of temperatures, from 25 °C to 150 °C, as indicated by capacitance-voltage (C - V). Since the thickness-to-area ratio is negligible, the nanocapacitor could be simulated as a single parallel plate capacitor in COMSOL Multiphysics, with good agreement between experimental and simulation data. As a proof-of-concept we simulated a MOSFET device with the nanocapacitor gate dielectric, whose drain current is sufficiently high for micro and nanoelectronics integrated circuits, including for applications in sensing.

摘要

我们使用原子层沉积技术制造了超薄金属氧化物半导体(MOS)纳米电容器。这些电容器由Al2O3和Y2O3双层组成,总厚度约为10 nm,沉积在硅衬底上。通过透射电子显微镜和X射线光电子能谱(XPS)确认了这两种材料的存在,每个平板厚度约为5 nm,且在大面积上均匀分布。积累电容在1.6 nF(1MHz时)至约2.8 nF(10 kHz时)之间变化,比其他纳米电容器高一个到两个数量级。这种高电容归因于超薄Al2O3和Y2O3层介电特性之间的协同作用。如电容 - 电压(C - V)所示,纳米电容器的电学性质在25°C至150°C的宽温度范围内稳定。由于厚度与面积之比可忽略不计,在COMSOL Multiphysics中可以将纳米电容器模拟为单个平行板电容器,实验数据与模拟数据吻合良好。作为概念验证,我们用纳米电容器栅极电介质模拟了一个MOSFET器件,其漏极电流对于微纳电子集成电路来说足够高,包括用于传感应用。

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