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纯并行连接中的宽带等离子体半减法器和数字解复用器。

Broadband plasmonic half-subtractor and digital demultiplexer in pure parallel connections.

作者信息

Wu Pei-Yuan, Chang Yun-Chorng, Huang Chen-Bin

机构信息

National Tsing Hua University, 101, Sec. 2, Kuang Fu Road, 30013, Hsinchu, Taiwan.

Academia Sinica, Taipei, China.

出版信息

Nanophotonics. 2022 Jul 14;11(16):3623-3629. doi: 10.1515/nanoph-2022-0267. eCollection 2022 Sep.

Abstract

Nanophotonic arithmetic circuits requiring cascaded Boolean operations are difficult to implement due to loss and footprint issues. In this work, we experimentally demonstrate plasmonic half-subtractor and demultiplexer circuits based on transmission-lines. Empowered by the unique polarization selectivity in the surface plasmon modal behaviors, both circuits are realized without cascading. The operations of the half-subtractor and demultiplexer can be performed using a single laser beam with three predefined linear polarizations. All of our experiments are performed using a 56 fs laser providing greater than 12.5 THz optical bandwidth. The experimental results are found in excellent quantitative accordance with numerical calculations. The photonic integrated circuit framework proposed in this work could pave the future avenue towards the realization of highly compact, multi-functional, on-chip integrated photonic processors.

摘要

由于损耗和占用面积问题,需要级联布尔运算的纳米光子算术电路难以实现。在这项工作中,我们通过实验展示了基于传输线的等离子体半减法器和解复用器电路。受表面等离子体模式行为中独特的偏振选择性的影响,这两种电路均无需级联即可实现。半减法器和解复用器的操作可以使用具有三种预定义线性偏振的单束激光来执行。我们所有的实验都是使用提供大于12.5太赫兹光学带宽的56飞秒激光进行的。实验结果与数值计算在定量上高度吻合。这项工作中提出的光子集成电路框架可为实现高度紧凑、多功能的片上集成光子处理器铺平未来道路。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/eafa/11501105/c0fc47c719da/j_nanoph-2022-0267_fig_001.jpg

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