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一种具有高能效和宽输入范围的时域多通道电阻式传感器接口集成电路。

A Time-Domain Multi-Channel Resistive-Sensor Interface IC With High Energy Efficiency and Wide Input Range.

作者信息

Han Sunglim, Seong Hoyong, Oh Sein, Koo Jimin, Jin Hanbit, Kim Hye Jin, Ha Sohmyung, Je Minkyu

出版信息

IEEE Trans Biomed Circuits Syst. 2025 Apr;19(2):291-299. doi: 10.1109/TBCAS.2025.3526813.

DOI:10.1109/TBCAS.2025.3526813
PMID:40173047
Abstract

This paper presents a 72-channel resistive-sensor interface integrated circuit (IC). The proposed IC consists of 8 sensor oscillator units and a reference clock generator. The sensor oscillator (S-OSC) units generate pulses with pulse widths dependent on the sensor input values, and the pulses are oversampled by the reference clock using frequency dividers. The time-domain signals are fed to the time-to-digital converters (TDCs) and converted to digital values. Each S-OSC unit is time-multiplexed to measure the resistance values from 9 sensors. Multiple phases from a highly energy-efficient phase-locked loop (PLL) are used for the TDCs, resulting in a signal-to-quantization-noise ratio (SQNR) that exceeds the intrinsic signal-to-noise ratio (SNR) of the sensor oscillators. This results in an effective number of bits (ENOB) of 9.3 bits at 310 pJ per channel. The maximum ENOB that can be achieved with a division ratio (N) of 256 is 14.1 bits and can be adjusted by changing N. Using this time-domain interface approach, the IC converts the sensor resistances directly into time, extending its measurement capabilities to 10 M. The proposed IC, designed and fabricated in a 180-nm CMOS process with an active area of 0.015 mm, consumes only 15.07 W per channel, resulting in a channel-specific Walden figure of merit (FoM) of 0.48 pJ per conversion step. In addition, by tuning N, the IC achieves an outstanding Schreier FoM of 159.8 dB in high-resolution scenarios.

摘要

本文介绍了一种72通道电阻式传感器接口集成电路(IC)。所提出的集成电路由8个传感器振荡器单元和一个参考时钟发生器组成。传感器振荡器(S-OSC)单元生成脉冲宽度取决于传感器输入值的脉冲,并且这些脉冲使用分频器由参考时钟进行过采样。时域信号被馈送到时间数字转换器(TDC)并转换为数字值。每个S-OSC单元通过时分复用测量来自9个传感器的电阻值。来自高能效锁相环(PLL)的多个相位用于TDC,从而产生超过传感器振荡器固有信噪比(SNR)的信号量化噪声比(SQNR)。这导致在每通道310 pJ时有效位数(ENOB)为9.3位。在分频比(N)为256时可实现的最大ENOB为14.1位,并且可以通过改变N进行调整。使用这种时域接口方法,该集成电路将传感器电阻直接转换为时间,将其测量能力扩展到10 M。所提出的集成电路采用180纳米CMOS工艺设计和制造,有源面积为0.015平方毫米,每通道仅消耗15.07微瓦,从而实现每转换步长0.48 pJ的通道特定沃尔登优值(FoM)。此外,通过调整N,该集成电路在高分辨率场景下实现了159.8 dB的出色施赖尔优值。

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