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用于具有基带和解析信号处理的数字光时域反射仪接收器的硬件高效相位解调

Hardware-Efficient Phase Demodulation for Digital -OTDR Receivers with Baseband and Analytic Signal Processing.

作者信息

Du Shangming, Chen Tianwei, Guo Can, Duan Yuxing, Wu Song, Liang Lei

机构信息

Sanya Science and Education Innovation Park of Wuhan University of Technology, Sanya 572000, China.

School of Safety Science and Emergency Management, Wuhan University of Technology, Wuhan 430070, China.

出版信息

Sensors (Basel). 2025 May 20;25(10):3218. doi: 10.3390/s25103218.

Abstract

This paper presents hardware-efficient phase demodulation schemes for FPGA-based digital phase-sensitive optical time-domain reflectometry (ϕ-OTDR) receivers. We first derive a signal model for the heterodyne ϕ-OTDR frontend, then propose and analyze three demodulation methods: (1) a baseband reconstruction approach via zero-IF downconversion, (2) an analytic signal generation technique using the Hilbert transform (HT), and (3) a wavelet transform (WT)-based alternative for analytic signal extraction. Algorithm-hardware co-design implementations are detailed for both RFSoC and conventional FPGA platforms, with resource utilization comparisons. Additionally, we introduce an incremental DC-rejected phase unwrapper (IDRPU) algorithm to jointly address phase unwrapping and DC drift removal, minimizing computational overhead while avoiding numerical overflow. Experiments on simulated and real-world ϕ-OTDR data show that the HT method matches the performance of zero-IF demodulation with simpler hardware and lower resource usage, while the WT method offers enhanced robustness against fading noise (3.35-22.47 dB SNR improvement in fading conditions), albeit with slightly ambiguous event boundaries and higher hardware utilization. These findings provide actionable insights for demodulator design in distributed acoustic sensing (DAS) applications and advance the development of single-chip DAS systems.

摘要

本文提出了适用于基于现场可编程门阵列(FPGA)的数字相敏光时域反射仪(ϕ-OTDR)接收机的硬件高效相位解调方案。我们首先推导了外差式ϕ-OTDR前端的信号模型,然后提出并分析了三种解调方法:(1)通过零中频下变频的基带重建方法,(2)使用希尔伯特变换(HT)的解析信号生成技术,以及(3)基于小波变换(WT)的解析信号提取替代方法。针对射频片上系统(RFSoC)和传统FPGA平台详细介绍了算法-硬件协同设计实现,并进行了资源利用率比较。此外,我们引入了一种增量直流抑制相位展开算法(IDRPU)来共同解决相位展开和直流漂移消除问题,在避免数值溢出的同时将计算开销降至最低。对模拟和实际ϕ-OTDR数据的实验表明,HT方法以更简单的硬件和更低的资源使用量匹配了零中频解调的性能,而WT方法在抗衰落噪声方面具有更强的鲁棒性(在衰落条件下信噪比提高3.35 - 22.47 dB),尽管事件边界略有模糊且硬件利用率更高。这些发现为分布式声学传感(DAS)应用中的解调器设计提供了可操作的见解,并推动了单芯片DAS系统的发展。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/d2e7/12115373/7d0299eaa322/sensors-25-03218-g001.jpg

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