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神经计算机SYNAPSE-1的多处理器与内存架构

Multiprocessor and memory architecture of the neurocomputer SYNAPSE-1.

作者信息

Ramacher U, Raab W, Anlauf J, Hachmann U, Beichter J, Brüls N, Wesseling M, Sicheneder E, Männer R, Glass J

机构信息

Siemens AG, Corp. R & D, Munich, Germany.

出版信息

Int J Neural Syst. 1993 Dec;4(4):333-6. doi: 10.1142/s0129065793000274.

DOI:10.1142/s0129065793000274
PMID:8049796
Abstract

A general purpose neurocomputer, SYNAPSE-1, which exhibits a multiprocessor and memory architecture is presented. It offers wide flexibility with respect to neural algorithms and a speed-up factor of several orders of magnitude--including learning. The computational power is provided by a 2-dimensional systolic array of neural signal processors. Since the weights are stored outside these NSPs, memory size and processing power can be adapted individually to the application needs. A neural algorithms programming language, embedded in C(+2) has been defined for the user to cope with the neurocomputer. In a benchmark test, the prototype of SYNAPSE-1 was 8000 times as fast as a standard workstation.

摘要

本文介绍了一种通用神经计算机SYNAPSE-1,它具有多处理器和内存架构。它在神经算法方面具有很大的灵活性,并且在包括学习在内的几个数量级上具有加速因子。计算能力由二维神经信号处理器脉动阵列提供。由于权重存储在这些神经信号处理器之外,因此内存大小和处理能力可以根据应用需求单独调整。已经为用户定义了一种嵌入在C(+2)中的神经算法编程语言,以应对该神经计算机。在一次基准测试中,SYNAPSE-1的原型比标准工作站快8000倍。

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