Wang C C, Truong T K, Shao H M, Deutsch L J, Omura J K, Reed I S
Jet Propulsion Laboratory, California Institute of Technology, Pasadena 91109, USA.
IEEE Trans Comput. 1985 Aug;C-34(8):709-17. doi: 10.1109/tc.1985.1676616.
Finite field arithmetic logic is central in the implementation of Reed-Solomon coders and in some cryptographic algorithms. There is a need for good multiplication and inversion algorithms that can be easily realized on VLSI chips. Massey and Omura recently developed a new multiplication algorithm for Galois fields based on a normal basis representation. In this paper, a pipeline structure is developed to realize the Massey-Omura multiplier in the finite field GF(2m). With the simple squaring property of the normal basis representation used together with this multiplier, a pipeline architecture is developed for computing inverse elements in GF(2m). The designs developed for the Massey-Omura multiplier and the computation of inverse elements are regular, simple, expandable, and therefore, naturally suitable for VLSI implementation.
