Zhang D, Jullien G A
Department of Computer Science, City University of Hong Kong, Kowloon, Hong Kong.
Int J Neural Syst. 1996 Dec;7(6):697-708. doi: 10.1142/s012906579600066x.
The use of neural-like networks to implement finite ring computations has been presented in a previous paper. This paper develops efficient VLSI neural system architecture for the finite ring recursive reduction (FRRR), including module reduction, MSB carry iteration and feedforward processing. These techniques deal with the basic principles involved in constructing a FRRR, and their implementations are efficiently matched to the VLSI medium. Compared with the other structure models for finite ring computation (e.g. modification of binary arithmetic logic and bit-steered ROM's), the FRRR structure has the lowest area complexity in silicon while maintaining a high throughput rate. Examples of several implementations are used to illustrate the effectiveness of the FRRR architecture.
前一篇论文中介绍了使用类神经网络来实现有限环计算。本文针对有限环递归约简（FRRR）开发了高效的超大规模集成电路（VLSI）神经系统架构，包括模块约简、最高有效位进位迭代和前馈处理。这些技术涉及构建FRRR的基本原理，并且它们的实现与VLSI介质有效匹配。与有限环计算的其他结构模型（例如二进制算术逻辑的修改和位导向只读存储器）相比，FRRR结构在硅片中具有最低的面积复杂度，同时保持高吞吐率。使用几个实现示例来说明FRRR架构的有效性。
