Murdocca M J, Sugla B
Appl Opt. 1989 Jan 1;28(1):182-8. doi: 10.1364/AO.28.000182.
Cascadable optically nonlinear arrays of logic devices interconnected with space invariant optical components are proposed for the core memory of a digital computer. Access time to any portion of the memory is O(log(2)N) gate delays for logic devices with fan-in and fan-out of two, where N is the size of the memory in bits. The cost of the design in switching components is near minimal for a random access memory (RAM) between one and two components per stored bit of information depending on the size of the memory. The design is extensible to very large RAMs, although parallel access memory is preferred to a RAM configuration for large memories due to the parallel access capability of the optical design.
本文提出了一种由与空间不变光学元件互连的逻辑器件构成的可级联光学非线性阵列，用于数字计算机的核心存储器。对于扇入和扇出均为2的逻辑器件，访问存储器任何部分的时间为O(log(2)N)门延迟，其中N是以比特为单位的存储器大小。根据存储器的大小，该设计在开关元件方面的成本对于随机存取存储器（RAM）而言接近最低，每个存储的信息比特在一到两个元件之间。尽管对于大容量存储器，由于光学设计的并行访问能力，并行访问存储器比RAM配置更受青睐，但该设计可扩展到非常大的RAM。
