Tolerance analysis of cascaded self-electro-optic-effect-device arrays.

In constructing symmetric self-electro-optic-effect-device-based, two-dimensional information processing circuits, it is necessary to know the nonuniformity that can be tolerated of the reflectivity responses of the arrays of devices. It is also necessary to know the allowable nonuniformity of the passive optical components used to direct beam arrays onto and between the active symmetric self-electro-optic-effect devices. A method for determining the mutual tolerances is presented with examples of the volumes of acceptable operation in the parameter space of the circuits. Leakage between devices is considered, which leads to acceptable regimes for those parameters that can be adjusted once the circuit has been constructed and to narrower regimes in which high clock and cycle rates can be achieved.