Hong Seung Hui, Kim Min Choul, Oh Hyoung Taek, Choi Suk-Ho, Kim Kyung Joong
Department Applied Physics, College of Applied Science, Institute of Natural Sciences, Kyung Hee University, Yongin 446-701, Korea.
J Nanosci Nanotechnol. 2011 Jan;11(1):148-51. doi: 10.1166/jnn.2011.3136.
Triple-layer structures of SiO2/Zr nanodots (NDs)/SiO2 for nonvolatile memories have been firstly fabricated at room temperature by using ion beam sputtering deposition (IBSD). High-resolution transmission electron microscopy and X-ray photoelectron spectroscopy demonstrate that Zr NDs self-assembled between the SiO2 layers by IBSD are changed into ZrO2 NDs by annealing. The memory window that is estimated by capacitance-voltage curves increases up to a maximum value of 5.8 V with increasing Zr amount up to 6 monolayers for the annealed samples. The memory window and the charge-loss rate at the programmed state are smaller before annealing, which is explained with reference to double oxide barriers of SiO2 and ZrO2.
通过离子束溅射沉积（IBSD）首次在室温下制备了用于非易失性存储器的SiO2/Zr纳米点（NDs）/SiO2三层结构。高分辨率透射电子显微镜和X射线光电子能谱表明，通过IBSD自组装在SiO2层之间的Zr NDs通过退火转变为ZrO2 NDs。对于退火样品，随着Zr含量增加到6个单层，由电容-电压曲线估计的记忆窗口增加到最大值5.8V。退火前，编程状态下的记忆窗口和电荷损失率较小，这可参考SiO2和ZrO2的双氧化物势垒来解释。
