Murota Junichi, Sakuraba Masao, Tillack Bernd
Laboratory for Nanoelectronics and Spintronics, Research Institute of Electrical Communication, Tohoku University, 2-1-1 Katahira, Aoba-ku, Sendai 980-8577, Japan.
J Nanosci Nanotechnol. 2011 Sep;11(9):8348-53. doi: 10.1166/jnn.2011.5052.
One of the main requirements for Si-based ultrasmall device is atomic-order control of process technology. Here, we show the concept of atomically controlled processing for group IV semiconductors based on atomic-order surface reaction control in Si-based CVD epitaxial growth. Self-limiting formation of 1-3 atomic layers of group IV or related atoms after thermal adsorption and reaction of hydride gases on Si(1-x)Gex(100) (x = 0-1) surface are generalized based on the Langmuir-type model. Moreover, Si-based epitaxial growth on N, P or C atomic layer formed on Si(1-x)Gex(100) surface is achieved at temperatures below 500 degrees C. N atoms of about 4 x 10(14) cm(-2) are buried in the Si epitaxial layer within about 1 nm thick region. In the Si(0.5)Ge(0.5) epitaxial layer, N atoms of about 6 x 10(14) cm(-2) are confined within about 1.5 nm thick region. The confined N atoms in Si(1-x)Gex preferentially form Si-N bonds. For unstrained Si cap layer grown on top of the P atomic layer formed on Si(1-x)Gex(100) with P atomic amount of below about 4 x 10(14) cm(-2) using Si2H6 instead of SiH4, the incorporated P atoms are almost confined within 1 nm around the heterointerface. It is found that tensile-strain in the Si cap layer growth enhances P surface segregation and reduces the incorporated P atomic amount around the heterointerface. Heavy C atomic-layer doping suppresses strain relaxation as well as intermixing between Si and Ge at the nm-order thick Si(1-x)Gex/Si heterointerface. These results open the way to atomically controlled technology for ULSIs.
硅基超小器件的主要要求之一是工艺技术的原子级控制。在此,我们展示了基于硅基化学气相沉积外延生长中的原子级表面反应控制,对IV族半导体进行原子控制加工的概念。基于朗缪尔型模型,概括了氢化物气体在Si(1-x)Gex(100)(x = 0 - 1)表面热吸附和反应后,IV族或相关原子的1 - 3个原子层的自限性形成。此外,在低于500摄氏度的温度下,实现了在Si(1-x)Gex(100)表面形成的N、P或C原子层上的硅基外延生长。约4×10(14) cm(-2)的N原子被埋入约1纳米厚区域内的硅外延层中。在Si(0.5)Ge(0.5)外延层中,约6×10(14) cm(-2)的N原子被限制在约1.5纳米厚的区域内。Si(1-x)Gex中受限的N原子优先形成Si - N键。对于使用Si2H6而非SiH4在Si(1-x)Gex(100)上形成的P原子量低于约4×10(14) cm(-2)的P原子层顶部生长的无应变硅帽层,掺入的P原子几乎被限制在异质界面周围1纳米范围内。发现硅帽层生长中的拉伸应变增强了P的表面偏析,并减少了异质界面周围掺入的P原子量。重C原子层掺杂抑制了应变弛豫以及纳米级厚的Si(1-x)Gex/Si异质界面处Si和Ge之间的混合。这些结果为超大规模集成电路的原子控制技术开辟了道路。