School of Electronics and Computing Systems, University of Cincinnati, Cincinnati, OH 45221, USA.
Nanotechnology. 2012 Jun 1;23(21):215201. doi: 10.1088/0957-4484/23/21/215201.
We study of the appearance and evolution of several anomalous (i.e., G < G(0) D 2e(2)/h) conductance plateaus in an In(0.52)Al(0.48)As/InAs quantum point contact (QPC). This work was performed at T = 4:2 K as a function of the offset bias ΔV(G) between the two in-plane gates of the QPC. The number and location of the anomalous conductance plateaus strongly depend on the polarity of the offset bias. The anomalous plateaus appear only over an intermediate range of offset bias of several volts. They are quite robust, being observed over a maximum range of nearly 1 V for the common sweep voltage applied to the two gates. These results are interpreted as evidence for the sensitivity of the QPC spin polarization to defects (surface roughness and impurity (dangling bond) scattering) generated during the etching process that forms the QPC side walls. This assertion is supported by non-equilibrium Green function simulations of the conductance of a single QPC in the presence of dangling bonds on its walls. Our simulations show that a spin conductance polarization as high as 98% can be achieved despite the presence of dangling bonds. The maximum in is not necessarily reached where the conductance of the channel is equal to 0:5G(0).
我们研究了在 In(0.52)Al(0.48)As/InAs 量子点接触 (QPC) 中几个异常 (即 G < G(0) D 2e(2)/h) 电导平台的出现和演化。这项工作是在 T = 4.2 K 下作为 QPC 两个平面门之间的偏置电压 ΔV(G) 的函数进行的。异常电导平台的数量和位置强烈依赖于偏置电压的极性。异常平台仅出现在几个伏特的中间偏置电压范围内。它们非常稳定，在施加到两个门的公共扫描电压的最大范围内观察到近 1 V。这些结果被解释为 QPC 自旋极化对在形成 QPC 侧壁的蚀刻过程中产生的缺陷（表面粗糙度和杂质（悬挂键）散射）敏感的证据。这一说法得到了在其壁上存在悬挂键的情况下单个 QPC 电导的非平衡格林函数模拟的支持。我们的模拟表明，尽管存在悬挂键，但仍可以实现高达 98%的自旋电导极化。最大值不一定出现在通道电导等于 0.5G(0) 的地方。
