Lee Jae-Kyu, Choi Duck-Kyun
Department of Materials Science and Engineering, Hanyang University, Seoul 133-791, Korea.
J Nanosci Nanotechnol. 2012 Jul;12(7):5859-63. doi: 10.1166/jnn.2012.6271.
Low temperature processing for fabrication of transistor backplane is a cost effective solution while fabrication on a flexible substrate offers a new opportunity in display business. Combination of both merits is evaluated in this investigation. In this study, the ZnO thin film transistor on a flexible Polyethersulphone (PES) substrate is fabricated using RF magnetron sputtering. Since the selection and design of compatible gate insulator is another important issue to improve the electrical properties of ZnO TFT, we have evaluated three gate insulator candidates; SiO2, SiNx and SiO2/SiNx. The SiO2 passivation on both sides of PES substrate prior to the deposition of ZnO layer was effective to enhance the mechanical and thermal stability. Among the fabricated devices, ZnO TFT employing SiNx/SiO2 stacked gate exhibited the best performance. The device parameters of interest are extracted and the on/off current ratio, field effect mobility, threshold voltage and subthreshold swing are 10(7), 22 cm2/Vs, 1.7 V and 0.4 V/decade, respectively.
用于制造晶体管背板的低温工艺是一种经济高效的解决方案，而在柔性基板上制造则为显示业务提供了新机遇。本研究评估了两者优点的结合。在本研究中，使用射频磁控溅射在柔性聚醚砜（PES）基板上制造了氧化锌薄膜晶体管。由于选择和设计兼容的栅极绝缘体是改善氧化锌薄膜晶体管电学性能的另一个重要问题，我们评估了三种栅极绝缘体候选材料：二氧化硅、氮化硅和二氧化硅/氮化硅。在沉积氧化锌层之前对PES基板两侧进行二氧化硅钝化有效地提高了机械和热稳定性。在所制造的器件中，采用氮化硅/二氧化硅堆叠栅极的氧化锌薄膜晶体管表现出最佳性能。提取了感兴趣的器件参数，开/关电流比、场效应迁移率、阈值电压和亚阈值摆幅分别为10(7)、22 cm2/Vs、1.7 V和0.4 V/十倍频程。
