Department of Chemistry and Chemical Biology, Harvard University, Cambridge, Massachusetts 02138, USA.
Nano Lett. 2013 Feb 13;13(2):594-9. doi: 10.1021/nl3041349. Epub 2013 Jan 7.
GaAs metal-oxide-semiconductor devices historically suffer from Fermi-level pinning, which is mainly due to the high trap density of states at the oxide/GaAs interface. In this work, we present a new way of passivating the interface trap states by growing an epitaxial layer of high-k dielectric oxide, La(2-x)Y(x)O(3), on GaAs(111)A. High-quality epitaxial La(2-x)Y(x)O(3) thin films are achieved by an ex situ atomic layer deposition (ALD) process, and GaAs MOS capacitors made from this epitaxial structure show very good interface quality with small frequency dispersion and low interface trap densities (D(it)). In particular, the La(2)O(3)/GaAs interface, which has a lattice mismatch of only 0.04%, shows very low D(it) in the GaAs bandgap, below 3 × 10(11) cm(-2) eV(-1) near the conduction band edge. The La(2)O(3)/GaAs capacitors also show the lowest frequency dispersion of any dielectric on GaAs. This is the first achievement of such low trap densities for oxides on GaAs.
砷化镓金属氧化物半导体器件历来存在费米能级钉扎问题，这主要是由于氧化物/砷化镓界面的高陷阱态密度所致。在这项工作中，我们提出了一种通过在 GaAs(111)A 上生长高介电常数氧化物外延层来钝化界面陷阱态的新方法，La(2-x)Y(x)O(3)。通过外延原子层沉积 (ALD) 工艺获得了高质量的外延 La(2-x)Y(x)O(3)薄膜，并且由此外延结构制成的 GaAs MOS 电容器具有非常好的界面质量，具有较小的频率色散和低的界面陷阱密度 (D(it))。特别是晶格失配仅为 0.04%的 La(2)O(3)/GaAs 界面在导带边缘附近的 GaAs 能带隙中表现出非常低的 D(it)，低于 3×10(11)cm(-2)eV(-1)。La(2)O(3)/GaAs 电容器在 GaAs 上的任何介电体中也表现出最低的频率色散。这是 GaAs 上氧化物达到如此低的陷阱密度的首次成果。
