Triebenberg Laboratory, Institute of Structure Physics, Technische Universität Dresden, 01062 Dresden, Germany.
Nano Lett. 2013 Apr 10;13(4):1410-5. doi: 10.1021/nl304229k. Epub 2013 Mar 5.
The performance of ferroelectric devices, for example, the ferroelectric field effect transistor, is reduced by the presence of crystal defects such as edge dislocations. For example, it is well-known that edge dislocations play a crucial role in the formation of ferroelectric dead-layers at interfaces and hence finite size effects in ferroelectric thin films. The detailed lattice structure including the relevant electromechanical coupling mechanisms in close vicinity of the edge dislocations is, however, not well-understood, which hampers device optimization. Here, we investigate edge dislocations in ferroelectric BiFeO3 by means of spherical aberration-corrected scanning transmission electron microscopy, a dedicated model-based structure analysis, and phase field simulations. Unit-cell-wise resolved strain and polarization profiles around edge dislocation reveal a wealth of material states including polymorph nanodomains and multiple domain walls characteristically pinned to the dislocation. We locally determine the piezoelectric tensor and identify piezoelectric coupling as the driving force for the observed phenomena, explaining, for example, the orientation of the domain wall with respect to the edge dislocation. Furthermore, an atomic model for the dislocation core is derived.
例如，铁电器件（如铁电场效应晶体管）的性能会因晶体缺陷（如位错）的存在而降低。例如，众所周知，位错在界面处形成铁电死层以及铁电薄膜中的有限尺寸效应中起着至关重要的作用。然而，位错附近的详细晶格结构，包括相关的机电耦合机制，还没有得到很好的理解，这阻碍了器件的优化。在这里，我们通过球差校正扫描透射电子显微镜、专门的基于模型的结构分析和相场模拟研究了铁电 BiFeO3 中的位错。在位错周围的单元晶胞分辨应变和极化分布中，揭示了丰富的材料状态，包括多型纳米畴和多个特征性固定在位错上的畴壁。我们局部确定了压电张量，并确定了压电耦合是观察到的现象的驱动力，例如，解释了畴壁相对于位错的取向。此外，还推导出了位错核心的原子模型。
