Xu Lijun, Zhou Haili, Cao Zhang
Key Laboratory of Precision Opto-Mechatronics Technology, Ministry of Education, School of Instrument Science and Opto-Electronic Engineering, Beihang University, Beijing 100191, China.
Rev Sci Instrum. 2013 Apr;84(4):044704. doi: 10.1063/1.4799971.
In this paper, a recursive least squares (RLS)-based demodulator is proposed for Electrical Tomography (ET) that employs sinusoidal excitation. The new demodulator can output preliminary demodulation results on amplitude and phase of a sinusoidal signal by processing the first two sampling data, and the demodulation precision and signal-to-noise ratio can be further improved by involving more sampling data in a recursive way. Thus trade-off between the speed and precision in demodulation of electrical parameters can be flexibly made according to specific requirement of an ET system. The RLS-based demodulator is suitable to be implemented in a field programmable gate array (FPGA). Numerical simulation was carried out to prove its feasibility and optimize the relevant parameters for hardware implementation, e.g., the precision of the fixed-point parameters, sampling rate, and resolution of the analog to digital convertor. A FPGA-based capacitance measurement circuit for electrical capacitance tomography was constructed to implement and validate the RLS-based demodulator. Both simulation and experimental results demonstrate that the proposed demodulator is valid and capable of making trade-off between demodulation speed and precision and brings more flexibility to the hardware design of ET systems.
本文提出了一种基于递归最小二乘法（RLS）的解调器，用于采用正弦激励的电阻抗断层成像（ET）。该新型解调器通过处理前两个采样数据，能够输出正弦信号幅度和相位的初步解调结果，并且通过递归方式纳入更多采样数据可进一步提高解调精度和信噪比。因此，可根据ET系统的特定要求，灵活地在解调电参数的速度和精度之间进行权衡。基于RLS的解调器适合在现场可编程门阵列（FPGA）中实现。进行了数值模拟以证明其可行性，并针对硬件实现优化相关参数，如定点参数的精度、采样率和模数转换器的分辨率。构建了基于FPGA的用于电容电阻抗断层成像的电容测量电路，以实现和验证基于RLS的解调器。仿真和实验结果均表明，所提出的解调器是有效的，能够在解调速度和精度之间进行权衡，并为ET系统的硬件设计带来更大的灵活性。
