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一种用于CMOS后端集成的超紧凑型电吸收调制器的设计,该调制器由沉积的TiN/HfO₂/ITO/Cu叠层组成。

Design of an ultra-compact electro-absorption modulator comprised of a deposited TiN/HfO₂/ITO/Cu stack for CMOS backend integration.

作者信息

Zhu Shiyang, Lo G Q, Kwong D L

出版信息

Opt Express. 2014 Jul 28;22(15):17930-47. doi: 10.1364/OE.22.017930.

Abstract

An ultra-compact electro-absorption (EA) modulator operating around 1.55-μm telecom wavelengths is proposed and theoretically investigated. The modulator is comprised of a stack of TiN/HfO2</ITO/Cu conformally deposited on a single-mode stripe waveguide to form a hybrid plasmonic waveguide (HPW). Since the thin ITO layer can behave as a semiconductor, the stack itself forms a MOS capacitor. A voltage is applied between the Cu and TiN layers to change the electron concentration of ITO (NITO), which in turn changes its permittivity as well as the propagation loss of HPW. For a HPW comprised of a Cu/3-nm-ITO/5-nm-HfO2/5-nm-TiN stack on a 400-nm × 340-nm-Si stripe waveguide, the propagation loss for the 1.55-μm TE (TM) mode increases from 1.6 (1.4) to 23.2 (23.9) dB/μm when the average NITO in the 3-nm ITO layer increases from 2 × 10(20) to 7 × 10(20) cm(-3), which is achieved by varying the voltage from -2 to 4 V if the initial NITO is 3.5 × 10(20) cm(-3). As a result, a 1-μm-long EA modulator inserted in the 400-nm × 340-nm-Si stripe waveguide exhibits insertion loss of 2.9 (3.2) dB and modulation depth of 19.9 (15.2) dB for the TE (TM) mode. The modulation speed is ~11 GHz, limited by the RC delay, and the energy consumption is ~0.4 pJ/bit. The stack can also be deposited on a low-index-contrast waveguide such as Si3N4. For example, a 4-μm-long EA modulator inserted in an 800-nm × 600-nm-Si3N4 stripe waveguide exhibits insertion loss of 6.3 (3.5) dB and modulation depth of 16.5 (15.8) dB for the TE (TM) mode. The influences of the ITO, TiN, HfO2 layers and the beneath dielectric core, as well as the processing tolerance, on the performance of the proposed EA modulator are systematically investigated.

摘要

本文提出并从理论上研究了一种工作在1.55μm通信波长附近的超紧凑型电吸收(EA)调制器。该调制器由一层TiN/HfO2/ITO/Cu共形沉积在单模条形波导上组成,形成混合等离子体波导(HPW)。由于薄ITO层可表现为半导体,该堆叠结构本身形成一个MOS电容器。在Cu和TiN层之间施加电压以改变ITO的电子浓度(NITO),进而改变其介电常数以及HPW的传播损耗。对于一个由400nm×340nm - Si条形波导上的Cu/3nm - ITO/5nm - HfO2/5nm - TiN堆叠组成的HPW,当3nm ITO层中的平均NITO从2×10²⁰增加到7×10²⁰cm⁻³时,1.55μm TE(TM)模式的传播损耗从1.6(1.4)dB/μm增加到23.2(23.9)dB/μm,如果初始NITO为3.5×10²⁰cm⁻³,则通过将电压从 - 2V变化到4V来实现。结果,插入400nm×340nm - Si条形波导中的1μm长的EA调制器对于TE(TM)模式表现出2.9(3.2)dB的插入损耗和19.9(15.2)dB的调制深度。调制速度约为11GHz,受RC延迟限制,能耗约为0.4pJ/bit。该堆叠结构也可以沉积在低折射率对比度的波导上,如Si3N4。例如,插入800nm×600nm - Si3N4条形波导中的4μm长的EA调制器对于TE(TM)模式表现出6.3(3.5)dB的插入损耗和16.5(15.8)dB的调制深度。系统地研究了ITO、TiN、HfO2层以及下方介质芯对所提出的EA调制器性能的影响,以及工艺容差的影响。

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