Ohta Hiroyuki
Department of Physiology, National Defense Medical College, Tokorozawa, Saitama 359-8513, Japan.
Biosystems. 2015 Jan;127:7-13. doi: 10.1016/j.biosystems.2014.10.003. Epub 2014 Oct 18.
In neuroscience research, a firing pattern expression, called a firing snapshot, defined by firing counts of multiple neurons in discrete time-bin is frequently used. However, the firing pattern expression over multiple neurons requires synchronization commonly known as a "central clock" in computation circuits to externally control or observe multi-neuron firing. Since it is not appropriate to hypothesize the central clock in the brain, we have to reconsider the synchronization assumption. We found the historical origins of central clock synchronization in the works of McCulloch, Pitts and von Neumann and propose an alternative perspective to study neural processing without the central clock. In the "First draft of a report on the EDVAC" known as the first proposal of store-program type computer, von Neumann incorporated McCulloch and Pitts' arbitrary assumption of constant synaptic delay into the logical circuit modeling. He introduced a constant pulse delay stabilized by a central clock to synchronize multiple pulse lines. This constant delay carried over to automaton theory by von Neumann and then theoretical neuroscience as an integral part of distributed representation and firing pattern analysis. Instead, we propose a rethinking of neuronal processing by focusing on a variable synaptic delay. We review neuron-type dependent differences and point out that the maximum inter-stimulus interval which can affect the last stimulus response is longer than the minimum inter-spike interval, indicating the possibility of asynchronous input summation without a firing rate level clock. This fundamental baseline contributes to the investigation of time consuming processes: e.g., the compression of appositional synaptic inputs with duration into a single firing.
在神经科学研究中,经常使用一种由离散时间间隔内多个神经元的放电计数定义的放电模式表达式,称为放电快照。然而,多个神经元的放电模式表达需要同步,这在计算电路中通常被称为“中央时钟”,以从外部控制或观察多神经元放电。由于假设大脑中有中央时钟是不合适的,我们必须重新考虑同步假设。我们在麦卡洛克、皮茨和冯·诺依曼的著作中发现了中央时钟同步的历史根源,并提出了一种在没有中央时钟的情况下研究神经处理的替代观点。在被称为存储程序型计算机的首个提议的《关于EDVAC的报告初稿》中,冯·诺依曼将麦卡洛克和皮茨关于恒定突触延迟的任意假设纳入逻辑电路建模。他引入了由中央时钟稳定的恒定脉冲延迟,以同步多条脉冲线。这种恒定延迟被冯·诺依曼带入自动机理论,然后进入理论神经科学,成为分布式表示和放电模式分析的一个组成部分。相反,我们建议通过关注可变突触延迟来重新思考神经元处理。我们回顾了神经元类型依赖性差异,并指出能够影响最后刺激反应的最大刺激间隔比最小峰间期长,这表明在没有放电率水平时钟的情况下存在异步输入总和的可能性。这个基本基线有助于研究耗时过程,例如将具有持续时间的并置突触输入压缩为单个放电。