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一种使用现场可编程门阵列(FPGA)设计和实现的多波段数字滤波器,用于在存在不同干扰信号的情况下提取心电图(ECG)信号。

Design and implementation of a multiband digital filter using FPGA to extract the ECG signal in the presence of different interference signals.

作者信息

Aboutabikh Kamal, Aboukerdah Nader

机构信息

Faculty of Biomedical Engineering, Al Andalus University for Medical Sciences, Tartous, Syria.

出版信息

Comput Biol Med. 2015 Jul;62:1-13. doi: 10.1016/j.compbiomed.2015.03.034. Epub 2015 Apr 11.

Abstract

In this paper, we propose a practical way to synthesize and filter an ECG signal in the presence of four types of interference signals: (1) those arising from power networks with a fundamental frequency of 50Hz, (2) those arising from respiration, having a frequency range from 0.05 to 0.5Hz, (3) muscle signals with a frequency of 25Hz, and (4) white noise present within the ECG signal band. This was done by implementing a multiband digital filter (seven bands) of type FIR Multiband Least Squares using a digital programmable device (Cyclone II EP2C70F896C6 FPGA, Altera), which was placed on an education and development board (DE2-70, Terasic). This filter was designed using the VHDL language in the Quartus II 9.1 design environment. The proposed method depends on Direct Digital Frequency Synthesizers (DDFS) designed to synthesize the ECG signal and various interference signals. So that the synthetic ECG specifications would be closer to actual ECG signals after filtering, we designed in a single multiband digital filter instead of using three separate digital filters LPF, HPF, BSF. Thus all interference signals were removed with a single digital filter. The multiband digital filter results were studied using a digital oscilloscope to characterize input and output signals in the presence of differing sinusoidal interference signals and white noise.

摘要

在本文中,我们提出了一种实用的方法,用于在存在四种干扰信号的情况下合成和滤波心电图(ECG)信号:(1)来自基频为50Hz的电网的干扰信号;(2)来自呼吸的干扰信号,频率范围为0.05至0.5Hz;(3)频率为25Hz的肌肉信号;以及(4)存在于ECG信号频段内的白噪声。这是通过使用数字可编程器件(Altera公司的Cyclone II EP2C70F896C6 FPGA)在教育与开发板(Terasic公司的DE2-70)上实现一个FIR多带最小二乘型的多带数字滤波器(七个频段)来完成的。该滤波器是在Quartus II 9.1设计环境中使用VHDL语言设计的。所提出的方法依赖于设计用于合成ECG信号和各种干扰信号的直接数字频率合成器(DDFS)。为了使合成的ECG规格在滤波后更接近实际的ECG信号,我们设计了一个单一的多带数字滤波器,而不是使用三个单独的数字滤波器——低通滤波器(LPF)、高通滤波器(HPF)和带阻滤波器(BSF)。这样,所有干扰信号都可以用一个数字滤波器去除。使用数字示波器研究了多带数字滤波器的结果,以表征在存在不同正弦干扰信号和白噪声的情况下的输入和输出信号。

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