Tomer D, Rajput S, Hudy L J, Li C H, Li L
Department of Physics, University of Wisconsin, Milwaukee, WI 53211, USA.
Nanotechnology. 2015 May 29;26(21):215702. doi: 10.1088/0957-4484/26/21/215702. Epub 2015 May 1.
Graphene (Gr) interfaced with a semiconductor forms a Schottky junction with rectifying properties, however, fluctuations in the Schottky barrier height are often observed. In this work, Schottky junctions are fabricated by transferring chemical vapor deposited monolayer Gr onto n-type Si and GaAs substrates. Temperature dependence of the barrier height and ideality factor are obtained by current-voltage measurements between 215 and 350 K. An increase in the zero bias barrier height and decrease in the ideality factor are observed with increasing temperature for both junctions. Such behavior is attributed to barrier inhomogeneities that arise from interfacial disorders as revealed by scanning tunneling microscopy/spectroscopy. Assuming a Gaussian distribution of the barrier heights, mean values of 1.14 ± 0.14 eV and 0.76 ± 0.10 eV are found for Gr/Si and Gr/GaAs junctions, respectively. These findings resolve the origin of barrier height inhomogeneities in these Schottky junctions.
与半导体界面结合的石墨烯（Gr）形成具有整流特性的肖特基结，然而，经常观察到肖特基势垒高度的波动。在这项工作中，通过将化学气相沉积的单层Gr转移到n型硅和砷化镓衬底上来制造肖特基结。通过在215至350 K之间进行电流-电压测量，获得了势垒高度和理想因子的温度依赖性。对于这两种结，随着温度升高，观察到零偏置势垒高度增加，理想因子减小。这种行为归因于扫描隧道显微镜/光谱学所揭示的由界面无序引起的势垒不均匀性。假设势垒高度呈高斯分布，发现Gr/Si和Gr/GaAs结的平均值分别为1.14±0.14 eV和0.76±0.10 eV。这些发现解决了这些肖特基结中势垒高度不均匀性的起源问题。
